9 asic verification engineer jobs at 6 companies in Phoenix, AZ
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Advanced ASIC FPGA Verification Engineer for Crypto and Cross Domain Solutions
Scottsdale, Arizona, United States
$135k-$150k/yr OnsiteFull Time
3+ YOEBachelor's in ECE/CS/math plus 5 years or Master's plus 3 years; DoD Secret clearance required; strong SystemVerilog, VHDL, UVM, coverage-driven verification, protocol and CDC knowledge; simulation and CI/CD experience.
SystemVerilog, VHDL, UVM, QuestaSim, ModelSim, Xilinx Vivado Design Suite, Questa CDC, Jenkins, GitLab CI, GitHub Actions, Python, Tcl, Bash, Perl, Git, Questa verification IP (QVIP)
1w
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Senior Design Verification Engineer
Tempe or Independence
$156k-$291k/yr RemoteFull Time
8+ YOE8+ years design verification experience with UVM, SystemVerilog, RTL verification for FPGA/ASIC, Bachelor's in EE/CE, US citizenship, ability to obtain Secret clearance, familiarity with Questa/Xcelium/VCS and AI verification tools.
Universal Verification Methodology (UVM), SystemVerilog, VHDL, Verilog, Questa, Xcelium, VCS, Jira
2mo
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Advanced ASIC FPGA Engineer- (Sign-on Bonus Available)
Scottsdale, Arizona, United States
$123k-$136k/yr HybridFull Time
5+ YOEBachelor's in Electrical/Computer Engineering (or related) with 5+ years experience (or Master's+3), U.S. citizenship, ability to obtain TS/SCI, proficiency in VHDL/Verilog, scripting (Tcl/Python/Perl), and ASIC/FPGA design and verification.
Microsoft Office, VHDL, Verilog, Tcl, Python, Perl, Xilinx, Microchip, ISE, Vivado, Libero, Precision, Synplify, QuestaSim, UVM, Questa CDC, Oscilloscope, Logic Analyzer, ChipScope, SystemVerilog, SVA, OVM
1mo
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Sr Principal ASIC FPGA Engineer (Sign-on Bonus Available)
Scottsdale, Arizona, United States
$182k-$202k/yr HybridFull Time
8+ YOERequires BS in electrical/computer engineering plus extensive experience (8–10+ years). TS/SCI clearance obtainable, proficiency with ASIC/FPGA design, verification, simulation, and Microsoft Office; strong communication and leadership skills.
Microsoft Office
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Principal Engineer
Chandler, Arizona, United States
$174k/yr OnsiteFull Time
5+ YOEBachelor's degree in electrical, electronic, or computer engineering and 5 years of progressive experience. Requires ARM, SystemVerilog, UVM, ASIC verification, SOC testbench, simulations, regression management, and C-based testing.
ARM, I2C, SPI, SPMI, UART, SOC Testbench, SystemVerilog, UVM, GLS, ASIC, C
5d
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EDA Tools SW Engineer
Hillsboro or Santa Clara or Austin or Phoenix
$174k-$330k/yr HybridFull Time
6+ YOEBS+10/ MS+8/ PhD+6 in Electrical/Computer Engineering or related,6+ years relevant experience, technical leadership, foundry/process/ASIC physical design and verification knowledge.
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Principal Engineer Electrical
Gilbert, Arizona, United States
$98k-$148k/yr OnsiteFull Time
5+ YOEBachelor's in STEM +5 years (or Master's +3 / PhD +1) experience in RTL/HDL FPGA/ASIC design for aerospace/space, proficiency in FPGA design flow, verification, synthesis, timing and power analysis; strong communication and problem solving.
HDL, RTL, Xilinx ISE/Vivado, Mentor Graphics ModelSim/QuestaSim, Synplify, System Verilog, Universal Verification Methodology (UVM), Signal Generators, Logic Analyzers, Digital Oscilloscopes, Embedded FPGA Debugging tools
1mo
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DFT Engineer (CE-64000920)
Austin or Chandler or Greensboro
HybridFull Time
2+ YOEMSEE with 2+ years or BS with relevant experience; hands-on ASIC DFT design and verification; experience with FastScan, TestKompress, TetraMAX, Test Compiler; MBIST, scan/ATPG, Verilog/SystemVerilog/VHDL; scripting (Perl, Python, TCL); strong communication.
FastScan, TestKompress, TetraMAX, Test Compiler, Verilog, SystemVerilog, VHDL, Perl, Python, TCL
3mo
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Senior Applications and Solutions Engineer - Foundry Services
Phoenix or Santa Clara or Hillsboro
$122k-$232k/yr HybridFull Time
4+ YOEUS citizen; ability to obtain US government security clearance; 4+ years CMOS/low-power/multi-voltage domain; ASIC design and verification experience; scripting in Python/Perl/Tcl.
Cadence, Synopsys, UPF/CPF, VCLP, Conformal LP, Python, Perl, Tcl