1,422 circuit design engineer jobs at 511 companies in United States
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SRAM Circuit Design Engineer
Beaverton, Oregon, United States
OnsiteFull Time
Design circuits for custom silicon, apply engineering fundamentals, and contribute to CPU/GPU/SoC/Neural Engine/Camera designs.
3mo
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CPU Circuit Design Engineer
Austin, Texas, United States
$142k-$269k/yr HybridFull Time
5+ YOEBachelor's/Master's in Electrical/Computer Engineering; 5+ years CPU circuit/backend design; 5+ years circuit design and STA; strong PPA tradeoff and debug skills.
Verilog, SPICE, Timing Analysis, Circuit Simulation
5d
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Circuit Design Engineer - E2
Orlando, Florida, United States
$81k-$151k/yr OnsiteFull Time
8+ YOEBachelor of Science in Electrical Engineering or equivalent and 8+ years of professional experience. Requires circuit card design, integration and test experience, plus schematic capture and circuit simulation tools.
Siemens Xpedition Enterprise, Cadence PSpice, oscilloscopes, spectrum analyzers, logic analyzers, network analyzers, power supplies, automated test equipment
1w
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Circuit Design Engineer Sr
Grand Prairie or Dallas
$98k-$182k/yr HybridFull Time
3+ YOEBachelor's degree in electrical engineering or related STEM field, 3+ years of circuit design experience, CCA design and test experience, Xpedition and PSpice proficiency, U.S. citizenship, and ability to obtain DoD Secret clearance.
Siemens Xpedition Enterprise, Cadence PSpice, Mentor Graphics HyperLynx, MATLAB, Xilinx FPGA, AMD FPGA, PCIe, Gigabit Ethernet, SERDES, DDR4, DDR5, CAMEO
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Senior Circuit Design Engineer
Santa Clara or California
$168k-$265k/yr HybridFull Time
8+ YOEBSEE or equivalent experience, MS preferred, and 8+ years of circuit design experience. Requires deep-submicron, digital, analog, mixed-signal, SPICE, EM/IR, and static timing analysis expertise.
SPICE, RTL, Perl, Tcl, Make
3mo
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Senior Circuit Design Engineer
Santa Clara or California
$168k-$265k/yr HybridFull Time
8+ YOEBSEE or equivalent (MS preferred), 8+ years circuit design experience, deep submicron and analog/mixed-signal familiarity, Spice simulation, EM/IR and static timing analysis, and mentoring/technical leadership.
Spice, EM/IR analysis, Static timing analysis, RTL, logic synthesis, Place and Route, DFT, Perl, Tcl, Make
2w
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SRAM/ROM Circuit Design Engineer
Austin, Texas, United States
HybridFull Time
8+ YOEBachelor's degree in electrical or computer engineering, 8+ years of SRAM memory circuit design experience, advanced CMOS experience at 5nm and beyond, Cadence Virtuoso, EDA tools, and Perl, Tcl, or Python scripting.
Cadence Virtuoso, EDA, Perl, Tcl, Python, LLM, GenAI
5d
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Senior Circuit Design Engineer
Austin or Raleigh or Mountain View or Hillsboro or Redmond
$120k-$235k/yr HybridFull Time
1+ YOEDegree in electrical, computer, or related engineering plus 1–5+ years of technical engineering experience depending on degree; SRAM/register-file design and timing, power, and EMIR characterization preferred.
SoC, SRAM, Register File, EMIR
2w
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Staff Memory Circuit Design Engineer
Mendota Heights, Minnesota, United States
$110k-$176k/yr OnsiteFull Time
8+ YOEBachelor's degree in Electrical Engineering and 8+ years of related experience; requires memory compiler or custom circuit expertise, transistor-level design, simulation, layout, verification, and automation skills.
Python
3w
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Senior Circuit Design Engineer, DRAM
Boise, Idaho, United States
OnsiteFull Time
6+ YOEBachelor's degree in electrical engineering or related field, or equivalent experience; 6+ years in digital or semiconductor design; specification translation, design verification, communication, and prioritization skills.
RTL, Claude Code, AI tools, CAD, STA
3w
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Senior Circuit Design Engineer, DRAM
Boise, Idaho, United States
OnsiteFull Time
6+ YOEBachelor's degree in electrical engineering or related field, or equivalent experience; 6+ years in digital or semiconductor design; specification translation, communication, prioritization, and design verification skills.
RTL, STA, Claude Code
2mo
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Staff Engineer, SRAM Circuit Design
San Jose, California, United States
$163k-$253k/yr OnsiteFull Time
8+ YOE8+ years experience in SRAM or memory circuit design, strong EE background, expertise with advanced nodes, device physics, Cadence/Spectre/HSPICE simulation, scripting (Python/Perl/TCL), and experience with layout/DFM and silicon bring-up.
HSPICE, finesim, Cadence Spectre, Cadence Virtuoso, Python, Perl, TCL
3mo
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Circuit Design Engineer - New College Grad 2026
Santa Clara or United States
$116k-$219k/yr HybridFull Time
0+ YOEMaster’s or PhD in Electrical Engineering or Computer Engineering; deep submicron process and digital/mixed-signal circuit experience; Spice simulations and timing analysis; RTL and verification knowledge; scripting skills.
SPICE, EM/IR analysis, Static timing analysis, RTL, logic synthesis, design-for-test (DFT), Perl, Tcl
2mo
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Senior Analog Circuit Design Engineer
Austin or San Diego
$160k-$227k/yr OnsiteFull Time
5+ YOEMS/PhD in engineering or CS, 5+ years analog/mixed-signal design (data converters, LDO/PMIC), Cadence and scripting proficiency, transistor-level analysis and silicon validation experience.
Cadence Virtuoso, Custom Compiler, Spectre, AMS, Matlab, Simulink, Tcl, Perl, Python, SKILL, shell script
1mo
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Senior Photonics Integrated Circuit Design Engineer
San Diego, California, United States
$96k-$182k/yr OnsiteFull Time
5+ YOEU.S. citizen able to obtain/maintain DoD Secret clearance, STEM degree with ~5+ years' experience designing integrated photonic circuits, hands-on photonics design, foundry familiarity, test and assembly experience.
Ansys Lumerical, Synopsys Optocompiler, KLayout
5d
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Senior Circuit Design Engineer (200051446)
United States
OnsiteFull Time
The available posting does not provide specific qualifications, experience requirements, education, certifications, or language requirements.
3mo
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Non-Volatile Memory Circuit Design Engineer
Richardson, Texas, United States
RemoteFull Time
10+ YOE10+ years NVM circuit design experience; Cadence/Synopsys flow; RTL design/verification; EE degree; remote option depending on skills.
Cadence, Synopsys, RTL design tools, PERL, Python, TCL, SKILL
2w
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Senior FPGA Circuit Design Engineer
San Jose, California, United States
$149k-$215k/yr OnsiteFull Time
8+ YOEBachelor’s degree in a relevant technical field and 8+ years of FPGA or ASIC design experience, including microarchitecture, RTL, simulation, verification, timing, power, and cross-functional integration.
FPGA, ASIC, Network-on-Chip (NoC), RTL, Static Timing Analysis (STA)
2mo
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RTL / Circuit IP Design Engineer
San Jose, California, United States
$146k-$250k/yr HybridFull Time
Design and implement RTL/IP features; strong RTL/Verilog/System Verilog, UVM, UPF, SAPR, and simulation/debugging skills; scripting (Python/Perl/Ruby/Makefile/shell); Bachelors or Masters in computer/electrical engineering required.
RTL, UVM, Linux, Windows, Verilog, System Verilog, Python, Perl, Ruby, Makefile, shell, HLS, SAPR, UPF
2mo
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Integrated Circuit Design Verification Engineer
Vancouver or Washington or California or New York City
$147k-$259k/yr OnsiteFull Time
10+ YOE10+ years of ASIC design verification experience, BSEE or MSEE (or equivalent), strong UVM/SystemVerilog skills, Siemens Questa experience, scripting (TCL/Make/Perl/Python/Shell), and excellent communication.
UVM, SystemVerilog, Siemens Questa, TCL, Make, Perl, Python, Shell, Linux
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