567 cmos jobs at 246 companies in United States
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CMOS Device Integration Team - DMTS
Boise, Idaho, United States
OnsiteFull Time
Master's degree in Electrical Engineering (or equivalent experience), hands-on CMOS device design/integration, semiconductor industry experience, and experience leading cross-functional technology development projects.
TCAD
1mo
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Principal Design Engineer CMOS Design Engineer – RF / Mixed-Signal
Manhattan Beach, California, United States
$114k-$171k/yr OnsiteFull Time
5+ YOEBachelor's in EE (or related) with 5+ years (masters 3+, PhD 0–2); transistor-level CMOS RF/mixed-signal design experience; SPICE and Cadence proficiency; PVT/Monte Carlo verification; strong communication.
Cadence Virtuoso, SPICE, VNA, spectrum analyzer, oscilloscope, probe station
1w
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Senior CMOS Test and Validation Lead, Analog Mixed-Signal, Raxium
Fremont, California, United States
$240k-$333k/yr OnsiteFull Time
10+ YOE2+ Mgmt10+ years test/post-silicon validation experience with CMOS, 2+ years technical leadership, Bachelor's in EE/CE or equivalent, BSM/PhD preferred, EM lab automation and data analysis experience.
Advantest V93000, Teradyne UltraFLEX, High-bandwidth Oscilloscopes, Spectrum Analyzers, BERTs, VNAs, C++, Python, MIPI
2mo
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Quantum Cryo CMOS Design Enablement
Malta, New York, United States
$98k-$176k/yr OnsiteFull Time
5+ YOEBS/MS in Electrical Engineering, Physics, or related; 5+ years experience in device modeling, characterization, EDA/PDK development; strong analytical and communication skills.
EDA tools, PDK
2mo
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Quantum Cryo CMOS Design Enablement
Malta, New York, United States
$98k-$176k/yr OnsiteFull Time
5+ YOEBS or MS in Electrical Engineering, Physics, Applied Physics, or related field; 5+ years; experience with device modeling, characterization, or test structures; familiarity with EDA tools and semiconductor design flows; strong analytical and communication skills
Electrical characterization tools, EDA tools, Test equipment
2mo
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Staff/ Principal Engineer, CMOS Process Integration, NTI
Singapore or United States
OnsiteFull Time
3+ YOEBS (or higher) in engineering or related field, 3+ years semiconductor experience in process integration and yield enhancement, proficiency with Python/SolidWorks/Tableau/Power BI desirable, strong data analysis, problem-solving, and communication; ability to travel to the US.
Python, SolidWorks, Tableau, Power BI
4w
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Senior Field Application Engineer - CMOS Image Sensor
California or United States or North America
RemoteFull Time
5+ YOEMaster's degree in relevant field, 5+ years industry experience in semiconductors/CIS, TCAD/process/device simulation experience, CMOS image sensor expertise, strong communication and problem-solving, Python scripting experience.
TCAD, EDA, Silvaco, Python, JMP, Minitab, SalesForce CRM
1w
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Staff Analogue Designer, CMOS Modelling
Oxford or College Park or California or Colorado or Massachusetts or Tennessee or Washington or Italy or Korea or Sweden or Switzerland or Canada or United Kingdom
HybridFull Time
10+ YOERequires 10+ years of analogue and mixed-signal design and modelling experience, expert Verilog-A/AMS, real-number modelling, mathematical modelling, Cadence flows, and SystemVerilog, MATLAB, or Python/NumPy.
Verilog-A, Verilog-AMS, SystemVerilog, MATLAB, Python, NumPy, Cadence AMS Designer, Xcelium, Spectre, Virtuoso
1mo
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RF/mm-Wave CMOS Power Amplifier Design Engineer
Atlanta, Georgia, United States
OnsiteFull Time
3+ YOEMasters/PhD in Electrical Engineering,3+ years RF PA design to 60GHz,PA tapeout experience (SOI/SiGe),strong circuit/EM skills,PEX/layout,EM simulation and RF system knowledge.
Cadence Virtuoso, Keysight ADS, Keysight SystemVue, Siemens Calibre, HFSS, Momentum, EMX
2mo
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Senior Quantum Engineer - Cryo-CMOS Analog Circuit Design
Redmond, Washington, United States
$120k-$235k/yr HybridFull Time
1+ YOEBachelor's in EE/CE + 6+ yrs (or MS +4 yrs, PhD +1 yr) in engineering or equivalent; experience in analog/mixed-signal and cryogenic design preferred; Cadence Virtuoso, Verilog/SystemVerilog, Linux experience; ability to meet export-control/security screening.
Cadence Virtuoso, Linux, Verilog, SystemVerilog
2mo
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Senior Quantum Engineer - Cryo-CMOS Analog Circuit Design (200036959)
United States
OnsiteFull Time
Not specified in the posting.
2mo
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CPU Memory Design Engineer
Austin, Texas, United States
$164k-$269k/yr HybridFull Time
6+ YOEBachelor's +6+ yrs or Master's +5+ yrs or PhD +2+ yrs; CMOS design; VLSI; memory design; power/performance/area trade-offs.
CMOS, VLSI, EDA tools, signal integrity
2d
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Sr. Device Integration and Innovation Engineering (Logic and/or Memory)
Santa Clara, California, United States
$163k-$224k/yr OnsiteFull Time
10+ YOEBachelor's degree and 10–15 years of experience in logic or memory technology, CMOS transistor formation, process engineering, and leading complex R&D projects.
CMOS, NAND, DRAM, FEOL, MEOL, BEOL
1w
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Director, Analog/Mixed-Signal Design
San Jose, California, United States
$240k-$300k/yr OnsiteFull Time
12+ YOERequires a B.S. in Electrical Engineering, 12+ years of analog/mixed-signal design experience, and production tapeouts in advanced FinFET CMOS nodes; M.S. or Ph.D. preferred.
FinFET, CMOS, EDA
1d
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Sr. Silicon Design Engineer
Fort Collins, Colorado, United States
$106k-$152k/yr OnsiteFull Time
1+ YOEMaster’s degree in electrical engineering, computer engineering, computer science, or related field; 1 year of related experience in ASIC, CMOS, physical design, EDA tools, and Verilog.
Verilog, ASIC, EDA, CMOS
3d
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Senior Staff Analog Engineer
San Jose, California, United States
$185k-$235k/yr HybridFull Time
10+ YOEMSEE and 10+ years in analog and mixed-signal design; expertise in CMOS, motor drivers, power management, high-voltage BCD, AMS verification, EDA tools, and Cadence.
CMOS, ADC, DAC, EDA, Cadence, FPGAs, DFT
5d
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Senior Semiconductor Product Engineer
San Jose or Maynard or Holmdel
$155k-$225k/yr HybridFull Time
MS or PhD in electrical or related engineering, semiconductor foundry or fabless experience, NPI-to-production transition experience, advanced CMOS knowledge, DFM, yield analysis, and programming skills.
JMP, Python, Advantest 93k ATE, ATE, WAT, CMOS, DFT, AI
1w
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Yield and PCI (Process Control Innovation) Engineer
Taylor, Texas, United States
$76k-$145k/yr OnsiteFull Time
Requires an engineering or science degree, semiconductor device physics and CMOS fabrication knowledge, SPC expertise, analytical problem-solving, technical communication, and ability to work in a 24/7 cleanroom environment.
Statistical Process Control (SPC), CMOS, Lithography, Etch, Thin Films, Chemical Mechanical Planarization (CMP), Diffusion, Implant
1mo
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Semiconductor Engineering Technician
Huntsville, Alabama, United States
$87k-$198k/yr OnsiteFull Time
10+ YOE10+ years in semiconductor design/fabrication/validation, SEM/FIB imaging, silicon wafer/chip prep, CMOS design or failure analysis, technical documentation, and Top Secret clearance eligibility.
Scanning Electron Microscope (SEM), Focused Ion Beam (FIB), CMOS
2d
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Sr. Device Integration and Innovation Engineering (Logic and/or Memory)
Santa Clara, California, United States
$163k-$224k/yr OnsiteFull Time
10+ YOEBachelor's degree and 10–15 years of experience in process engineering, CMOS logic transistor formation, and Logic or Memory technology; expertise leading complex engineering projects and R&D initiatives.
CMOS, NAND, DRAM
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