80 cpu design engineer jobs at 19 companies in San Jose, CA
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Senior CPU Engineer
Santa Clara, California, United States
$142k-$213k/yr OnsiteFull Time
Master's degree or foreign equivalent in electrical engineering, computer engineering, computer science, or related field; experience with CPU architecture, microarchitecture, physical design, verification, and implementation.
CPU, Computer Processing Unit (CPU)
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Senior CPU RTL Design Engineer
Mountain View, California, United States
$163k-$237k/yr OnsiteFull Time
8+ YOEBachelor's degree or equivalent,8+ years implementing CPU cache subsystems,RTL/System Verilog experience,and familiarity with lint and UPF; strong microarchitecture and collaboration skills.
System Verilog, Lint, UPF, ARM Instruction Set Architecture
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Staff Design Verification Engineer – High Performance CPU Core
Austin or Santa Clara
OnsiteFull Time
7+ YOE7+ years ASIC/CPU/SoC design verification experience, strong SystemVerilog and UVM skills, CPU microarchitecture knowledge, BS in EE/CE/CS, strong debug and verification strategy abilities.
SystemVerilog, UVM, Python, C, C++
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Senior CPU Tooling and Design Automation Engineer
Santa Clara or Austin
$136k-$265k/yr OnsiteFull Time
5+ YOE5+ years EDA tool development experience, bachelor's in computer or electrical engineering (or equivalent), proficiency with EDA databases and Make, strong communication and teamwork.
Make
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CPU Physical Design and Integration Engineer
Santa Clara, California, United States
OnsiteFull Time
BS degree; experience with place-and-route and physical verification; scripting in Perl or Tcl.
Place and Route tools, PDV, DRC/LVS, Python, Perl, Tcl
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Senior CPU Tooling and Design Automation Engineer
Santa Clara or Austin
$136k-$265k/yr OnsiteFull Time
5+ YOEBachelor's in computer or electrical engineering (or equivalent),5+ years EDA tool development experience,proficiency with EDA databases,graph algorithms,Make and scripting,strong communication and teamwork.
Make, EDA
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Sr. Engineer, CPU RTL Design
Austin or Santa Clara
$100k-$500k/yr HybridFull Time
Experience in CPU microarchitecture, RTL coding (Verilog/VHDL), and cross-functional collaboration.
Verilog, VHDL, Simulation Tools, Synthesis Tools, Power Analysis Tools
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CPU Core Physical Design Thermal Modeling Lead
Santa Clara or Austin or Fort Collins or Boxborough
$175k-$300k/yr HybridFull Time
Requires a bachelor's or master's degree in computer or electrical engineering, strong physical design and EDA experience, SoC/IP design knowledge, package modeling familiarity, and scripting and flow automation expertise.
EDA, SoC, IP
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ML ASIC Design Engineer
Mountain View or New York City
$175k-$215k/yr HybridFull Time
5+ YOEBS in Computer Engineering or equivalent experience; 5+ years with SystemVerilog, ASIC RTL design, and microarchitecture; 3+ years designing high-performance CPU, GPU, or NPU cores; Python or C++.
SystemVerilog, Python, C++, Chisel, Scala
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Mid Level ASIC Design Engineer
Sunnyvale or Munich
OnsiteFull Time
3+ YOERequires 3+ years of ASIC RTL design experience with Verilog or SystemVerilog, CPU IP integration, processor architecture and interface knowledge, front-end ASIC tools, low-power design, and a bachelor's degree in electrical or computer engineering.
Verilog, SystemVerilog, ARM, RISC-V, MIPS, AMBA, APB, AXI, SPI, eMMC, MII, GPIO, I2C, UPF
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Senior/Staff Design Engineer
Santa Clara or Richardson or Austin
$69k-$202k/yr OnsiteFull Time
2+ YOEBachelor's (3–7 yrs) or Master's (2–5 yrs); knowledge of CPU microarchitecture, System Verilog/Verilog/VHDL, simulators, timing/power; scripting in Perl or Python; experience with RISC-V/ARM/MIPS preferred.
System Verilog, Verilog, VHDL, Perl, Python, RISC-V, ARM, MIPS
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Design Verification Engineer IV
San Jose, California, United States
$112k-$176k/yr OnsiteFull Time
6+ YOEExpertise in SystemVerilog/UVM, AXI/PCIe/Ethernet/NOC/UCIe protocols, CPU architectures (ARM, RISC-V) and C/C++; 6–8+ years verification experience; formal verification and scripting experience; ability to architect SoC verification environments.
SystemVerilog (SV), UVM, AXI, NOC, Ethernet, PCIe, UCIe, ARM, RISC-V, C, C++
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PMTS ASIC Digital Design IP ENGINEERING
Santa Clara, California, United States
$167k-$275k/yr OnsiteFull Time
12+ YOEBachelor's or master's degree in electrical or computer engineering; 12+ years in processor, CPU, DSP, or complex SoC digital design; expert Verilog/SystemVerilog and processor microarchitecture expertise.
Verilog, SystemVerilog, EDA
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Staff Engineer, GPU Design Verification (Subsystems)
Austin or San Jose
$151k-$252k/yr OnsiteFull Time
6+ YOE6+ years in GPU/CPU/semiconductor design verification; strong SystemVerilog/UVM, C/C++, Python; testbench development; debugging and collaboration skills.
SystemVerilog, UVM, C++, Python, Perl
2mo
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Design Verification Intern
Burlingame, California, United States
$45-$60/hr OnsiteInternship, Temporary
Pursuing a computer science, electrical engineering, or related degree; familiarity with CPU/GPU verification; proficiency in SystemVerilog, SystemC, or C/C++; UVM is a plus; strong debugging and communication skills.
SystemVerilog, SystemC, C++, UVM, Python, LLMs
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Hardware Engineer
Milpitas, California, United States
$136k-$193k/yr OnsiteFull Time
5+ YOEBachelor or higher degree in Electrical/Computer Engineering with 5+ years, or Master with 3+ years, or PhD with 0+ years in system-level development; experience in hardware design and validation.
Cadence concepts, Cadence Allegro, SoC architectures, CPU architectures, FPGA, Oscilloscopes, Logic analyzers, Spectrum analyzers, Board design tools, High-speed interfaces
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L6 Product Development Engineer FA
Santa Clara, California, United States
$45k-$121k/yr OnsiteFull Time
4+ YOEBS in Electrical Engineering, 4+ years in server hardware or datacenter system design, strong experience with server platforms, PCIe/DDR/NVMe storage, power delivery and board-level debug, and factory/manufacturing execution.
CM, ODM, CPU, GPU, DDR, PCIe, VRM, NIC, NVMe, SATA, SAS, NVIDIA HGX, NVLink, CXL, DDR4, DDR5, PCIe Gen4, PCIe Gen5, PCIe Gen6, Redfish, IPMI, BIOS, BMC, oscilloscopes, logic analyzers, power analyzers, NPI, PDN, AC/DC PSU
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Software Dev Engineer, Edge Technology
Sunnyvale, California, United States
$165k-$224k/yr OnsiteFull Time
3+ YOE3+ years software development, 2+ years system design/architecture, ARM CPU knowledge, ML/LLM fundamentals, EM/ownership of design and cross-functional collaboration.
ARM CPUs, Machine Learning, LLM, transformer architecture
2mo
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GPU Driver & Memory Management Architect
Spring or Palo Alto or Houston
$147k-$231k/yr OnsiteFull Time
10+ YOEDesign GPU/NPU driver architectures and memory management for shared CPU/GPU/NPU use; 10+ years experience recommended; degree in electrical or related engineering preferred; expertise in memory/GPU design, hardware architecture, debugging, and laboratory tools.
DVMT, WDDM, Windows, Linux, MATLAB, Oscilloscope, FPGA
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Silicon Architect
San Francisco, California, United States
$198k-$233k/yr HybridFull Time
10+ YOE10+ years in semiconductor definition, architecture, SoC/ASIC development, or system architecture for high-volume consumer electronics; expertise in low-power design, semiconductor flows, vendors, and technical leadership.
SoC, ASIC, RTL, CPUs, NPUs, DSPs
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