4 design verification engineer jobs at 1 company in Bryan, OH
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Principal FPGA Engineer
Fort Wayne, Indiana, United States
$108k-$205k/yr OnsiteFull Time
8+ YOEU.S. citizenship and active DoD Secret clearance required. Typically requires a STEM degree and 8+ years experience in FPGA/ASIC design or verification with VHDL/Verilog/SystemVerilog and FPGA toolflows; leadership and lab integration experience.
AMD Vivado, Altera Quartus Prime Pro, Libero, VHDL, Verilog, SystemVerilog, UVM, Veloce, High Level Synthesis (HLS), Vitis AI, FINN, ARM, Microblaze, NIOS, Earned Value, Agile Execution
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Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, Indiana, United States
$132k-$252k/yr OnsiteFull Time
10+ YOESTEM degree with 10+ years experience (or advanced degree with 7+ years). Must be U.S. citizen, able to obtain/maintain DoD Secret clearance. Hands-on RTL design (VHDL/Verilog), RTL verification, timing closure, ASIC/FPGA tool proficiency.
VHDL, Verilog, SystemVerilog, ModelSim, Synplify, Quartus, Vivado, QuestaSim, Unix, Linux, C, C++, Python, Perl, shell
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Senior Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, Indiana, United States
$87k-$165k/yr OnsiteFull Time
5+ YOEU.S. citizenship and active DoD Secret clearance required. Typically requires a STEM degree (Bachelor's +5 years or Advanced Degree +3 years). Experience with RTL coding (Verilog/VHDL), System Verilog testbenches, FPGA/ASIC design, timing closure, and verification tools. Familiarity with Git/Subversion, Unix, and C/C++ or Perl.
Verilog, VHDL, System Verilog, ModelSim, Synplify, Quartus, Vivado, Git, Subversion, Unix, C/C++, Perl
4w
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Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Engineer II
Fort Wayne, Indiana, United States
$69k-$131k/yr OnsiteFull Time
Master's in EE/CE or related STEM, ability to obtain DoD Secret clearance (U.S. citizenship), FPGA/ASIC design or verification experience (VHDL/Verilog/SystemVerilog), hands-on lab integration/debug, and experience with AMD/Altera/Microchip toolchains.
VHDL, Verilog, SystemVerilog, AMD Vivado, Altera Quartus Prime Pro, Libero, High Level Synthesis (HLS), UVM, ARM, Microblaze, NIOS