15 design verification engineer jobs at 11 companies in Granby, CO
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Design Verification Engineer
Broomfield or San Diego or Fort Collins or San Jose or Irvine
$144k-$230k/yr OnsiteFull Time
10+ YOE12+ years verification experience for complex digital and mixed-signal circuits; proficiency with SystemVerilog/UVM/SVA, scripting, simulation tools, and RTL/gate-level debug; BS/MS in EE/CE.
SystemVerilog, UVM, SVA, Synopsys, Cadence, Mentor, Perl, Python, Tcl, DesignSync, git, Palladium, Veloce, Zebu, Xilinx, ICL, PDL, Tessent
2mo
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ASIC Design Verification Engineer
Irvine or Andover or Broomfield
$129k-$207k/yr OnsiteFull Time
3+ YOEConstrained-random design verification experience using System Verilog/UVM, coverage-driven methodologies, experience with VCS/Incisive and scripting (Python/Perl). Degree with significant related experience required (varies by degree).
System Verilog, UVM, VCS, Incisive, Python, Perl
5d
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2027 Masters Hardware Design Verification Engineering Intern/Co-op
Austin or Boxborough or Fort Collins or Longmont or Fishkill or Rochester or Secaucus
$80k-$120k/yr HybridInternship, Temporary
Currently enrolled in a U.S. bachelor's program in electrical or computer engineering or related field; knowledge of programming, hardware verification, digital systems, and lab equipment preferred.
C++, Python, C, Perl, Shell, UVM, Verilog, SystemVerilog, MySQL, PHP, Linux, Unix, Windows, FSM, HDL, Oscilloscopes, Voltmeters, Logic analyzers, Multimeters
1mo
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Staff FPGA Design Engineer
Berthoud, Colorado, United States
$150k-$180k/yr OnsiteFull Time
10+ YOEB.S. in Electrical Engineering with 10+ years in electronics hardware and ASIC/FPGA development for flight avionics; experience with mixed-signal design, VHDL/Verilog/SystemVerilog, timing closure, EMI/EMC, and hardware verification.
VHDL, Verilog, SystemVerilog, Python, TCL, Xilinx, Microsemi, MATLAB, Simulink, SPICE, Altium, SystemVerilog UVM, C, C++, assembly language, Linux/Windows shell scripting, Cocotb
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Analog ASIC Design Engineer
Boulder or Louisville or Beaverton
HybridFull Time
5+ YOEBSEE or MSEE in EE, 5+ years analog/mixed‑signal IC design experience, ASIC design and verification tool proficiency, RF and layout experience, lab characterization, strong communication and collaboration skills.
Ansys HFSS, Cadence EMX
1w
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ASIC & FPGA Design Engineer Stf - E4
Littleton or Sunnyvale or Denver or Boulder or Louisville or Highlands Ranch or King of Prussia
$136k-$252k/yr OnsiteFull Time
Bachelor of Science in Electrical Engineering or related field, or equivalent experience; ASIC/FPGA design, debugging, or verification experience; active Top Secret clearance and U.S. citizenship required.
ASIC, FPGA, Microsoft Project, Microsoft Office, Atlassian JIRA, Earned Value Management System (EVMS)
5d
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2027 Undergrad Hadware Design Verification Engineering Intern/Co-Op
Austin or Boxborough or Fishkill or Fort Collins or Longmont or Rochester or Secaucus
$59k-$89k/yr HybridInternship, Temporary
Current U.S. university bachelor's student in electrical, computer, or related engineering. Knowledge of C++, Python, C, Perl, Shell, UVM, Verilog, SystemVerilog, digital systems, Linux, and hardware testing preferred.
C++, Python, C, Perl, Shell, UVM, Verilog, SystemVerilog, MySQL, PHP, Linux, Unix, Windows, HDL, FSM, Oscilloscope, Volt meter, Logic analyzer, Multimeter
2mo
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Sr Design Quality Engineer
Lafayette, Colorado, United States
$98k-$148k/yr OnsiteFull Time
4+ YOEBachelor's degree and 4+ years quality experience (2+ with Master's), medical device or regulated-industry experience, knowledge of ISO 13485/21 CFR 820/EU MDR, ISO 14971 risk management, verification/validation, CAPA and failure analysis, PCB/electronic hardware experience, and strong communication.
Minitab
2mo
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Mechanical Engineer
Golden, Colorado, United States
$85k-$160k/yr OnsiteFull Time
5+ YOEBachelor's in mechanical engineering,5+ years mechanical design experience (spacecraft/aerospace/robotics preferred),CAD and tolerance experience,testing and verification experience,strong communication and systems integration skills.
Onshape, SolidWorks, NX, Creo, ASME Y14.5, Nastran, Femap, ANSYS, Abaqus, Thermal Desktop
1mo
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Principal Systems Engineer
Broomfield, Colorado, United States
$140k-$205k/yr OnsiteFull Time
12+ YOEBachelor's in engineering, 12+ years designing complex aerospace/robotics/autonomous systems; experience with system architecture, requirements management, integration, verification/validation; strong technical communication; able to work extended hours and weekends.
model-based systems engineering (MBSE)
2mo
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Senior Engineer I - Systems
Boulder, Colorado, United States
$70k-$143k/yr OnsiteFull Time
5+ YOEBachelor's in STEM, 5+ years systems engineering experience (requirements, design, implementation, verification), Python/MATLAB experience, familiarity with digital test equipment, US citizenship required; up to 15% travel.
Python, MATLAB, Linux, Unix, Oscilloscope, Spectrum Analyzer, Multi-Meter
2mo
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Electrical Engineer III
Louisville, Colorado, United States
$84k-$147k/yr OnsiteFull Time
0+ YOEBS (5–7 yrs), MS (3–5 yrs), or PhD (0–2 yrs) in electrical engineering or related field; electronic hardware design, verification/validation, high-speed digital/analog/mixed-signal design, prototype bring-up, PCB considerations, ESD/cleanroom experience, and periodic travel.
I2C, SPI, UART, RS-232, RS-422, RS-485, CAN, SPICE, Python, MATLAB, C, Electrical Ground Support Equipment (EGSE)
2mo
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Prin. Hardware Engineer - Clem
Mounds View or Lafayette
$141k-$211k/yr OnsiteFull Time
10+ YOE10+ years medical device hardware experience; systems hardware design, verification, and debugging; knowledge of international medical standards, wireless and battery-powered systems; mentoring and technical leadership.
CAD, Agile, Stage Gate
1mo
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
5d
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2027 Undergrad Hardware Engineering intern/co-op
Austin or Boxborough or Fort Collins or Longmont or Fishkill or Rochester
HybridInternship, Temporary
Current US university undergraduate majoring in electrical engineering, computer engineering, or a related field; knowledge of hardware design, verification, automation, validation, or testing is encouraged.
C/C++, Verilog, VHDL, Python, Perl, Spice, Ruby, Chrome OS, MATLAB, UNIX, JTAG
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