10 design verification engineer jobs at 8 companies in Oak Forest, IL
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Design Verification Engineer (Lab Project Specialist)
Chicago or United States or France or Germany or Brazil or Poland
$85k-$115k/yr OnsiteFull Time, Contract
3+ YOEBachelor's degree in engineering or related discipline, 3+ years in medical device development, verification, testing, or systems engineering, plus design controls, test methods, data analysis, and technical reporting experience.
Minitab, JMP, IEC 60601, ISO 11608, ISO 13485, ISO 14971, GR&R, PPE
1mo
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Senior Design Quality Engineer - Medical Devices
Carlsbad or Chicago or Raleigh or Durham or Greensboro or Pittsboro
$100k-$140k/yr HybridFull Time
5+ YOEBachelor's degree,5+ years relevant experience,knowledge of FDA 21 CFR 820/ISO 13485/ISO 14971,cGMP,GxP; experience with electromechanical devices, audits, risk management, and verification/validation.
1w
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Hardware Engineer
Chicago, Illinois, United States
$200k-$225k/yr OnsiteFull Time
BS+ in a technical discipline, strong SystemVerilog RTL design experience, digital design knowledge, C++ and scripting experience, verification and testing expertise, networking fundamentals, and strong debugging skills.
SystemVerilog, C++, Python, Bash, FPGA, Ethernet, PMA
2mo
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Engineer II, DEV
North Barrington, Illinois, United States
$80k-$110k/yr OnsiteFull Time
2+ YOEBachelor's or master’s in biomedical/mechanical or related engineering; 2–5 years medical device experience; SolidWorks proficiency; experience with design controls, verification/validation, FMEA; project leadership and Microsoft Office skills.
SolidWorks, Microsoft Office
1mo
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FPGA Firmware Developer
Batavia, Illinois, United States
$100k-$131k/yr OnsiteFull Time
4+ YOEDesign and implement FPGA logic and embedded firmware; perform simulation, timing analysis, verification, hardware–firmware integration; provide technical direction. Requires engineering degree and multi-year experience.
Zynq, UltraScale, 7-Series, Vivado, Vitis, High-Level Synthesis (HLS), JTAG, Integrated Logic Analyzer (ILA)
3mo
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FPGA Engineer (IL, Schaumburg)
Schaumburg, Illinois, United States
OnsiteFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Experience with RTL, C/C++, Python, VHDL/Verilog; hardware security; FPGA design and verification; system integration; cryptography concepts.
C/C++, Python, VHDL, Verilog, Tcl, Vivado, Questa, Quartus Prime, GHDL, Xilinx, Versal, Agilex, AXI, Avalon, cocotb, pyuvm
2mo
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FPGA Engineer
Amsterdam or Chicago or London or New York City or Singapore
OnsiteFull Time
Professional FPGA/ASIC design and verification experience; SystemVerilog/Verilog/VHDL and C++; familiarity with EDA tools and scripting (TCL, Python, Bash); university degree in EE/CS/CE or related.
SystemVerilog, Verilog, VHDL, C++, TCL, Python, Bash, EDA
2mo
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FPGA Engineer
Chicago, Illinois, United States
$120k-$170k/yr OnsiteFull Time
4+ YOE4+ years FPGA/ASIC experience, expert SystemVerilog and FPGA design, SoC and high-speed transceiver knowledge, simulation/verification skills, degree in EE/CE, strong analytical and collaboration skills.
SystemVerilog
2mo
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Hardware Engineer
Chicago, Illinois, United States
$200k-$225k/yr OnsiteFull Time
BS in EE/CE/CS or related, strong RTL design using SystemVerilog, C++ experience, verification and multi-clock-domain knowledge, Ethernet fundamentals, Python/Bash scripting, and strong debugging and collaboration skills.
SystemVerilog, C++, Python, Bash, FPGA, PMA (Physical Media Attachment), Ethernet, RTL
3w
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Engineering Specialist-Tool & Die
Chicago Heights, Illinois, United States
$87k-$166k/yr OnsiteFull Time
5+ YOE5+ years die engineering experience, proficiency in progressive die design, PFMEA, CAD die development, vendor review, and MS Office; Bachelors degree or Tool & Die Journeyman's Card; CAD and virtual verification tool experience preferred.
CATIA V5, I-DEAS, UniGraphics, Vis-Mock-Up, Smirt, Microsoft Excel, Microsoft Outlook