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Verification CAD Engineer
Milpitas, California, United States
$160k-$265k/yr HybridFull Time
7+ YOEB.S./M.S. in EE/CE/CS,7+ years design verification experience,expert SystemVerilog/UVM and SVA/CDV,advanced Python and Shell skills,Linux and regression farm experience (LSF/NC/Slurm),familiarity with Cadence verification tools.
SystemVerilog, UVM, SVA, Python, Shell, Perl, Xcelium, SimVision, vManager, Verissium, Linux, LSF, NC, Slurm
2mo
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R&D Engineer IC Design
San Jose, California, United States
$120k-$192k/yr OnsiteFull Time
6+ YOE6+ years in design verification; master’s in ECE/CS; SystemVerilog, scripting; UVM preferred; knowledge of networking and switching.
SystemVerilog, UVM, Scripting, Testbenches, ATE testing
2w
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Product Engineer
Alameda or Milpitas
$114k-$228k/yr OnsiteFull Time
4+ YOEBS in engineering or CS required; 4+ years in software development, electrical design/testing, or process verification; medical device experience preferred; experience with embedded and application software and manufacturing validation.
C#, Python, C++, C, SMT, digital multimeters, oscilloscopes, UART, SPI, NFC, Bluetooth
2w
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Product Engineer
Alameda or Milpitas
$114k-$228k/yr OnsiteFull Time
4+ YOEBS in engineering/computer science required, 4+ years in software development, electrical design/testing, or verification; medical device experience preferred; experience with embedded/firmware development, electrical schematics, and manufacturing validation.
C#, Python, C++, C, digital multimeter, oscilloscope, UART, SPI, NFC, Bluetooth, ISO 13485, 21 CFR 820, IEC 62304
3w
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Senior Hardware Test Engineer
Fremont or California or United States
$170k-$221k/yr HybridFull Time
5+ YOE5+ years in test engineering/design verification for electrical or mechatronic systems; experience with actuators, motor controllers, sensors, EtherCAT, lab instrumentation, Python scripting, and subsystem-level verification; BS in related field required.
EtherCAT, Python, oscilloscopes, logic analyzers, DAQs, power supplies, environmental test equipment, motor controllers, PCBAs, sensors
2w
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Senior Electrical Engineer
Fremont or Salem or Pittsburgh
$174k-$226k/yr HybridFull Time
7+ YOEBachelor's degree in EE (Master's preferred), 7+ years electrical design experience, Altium expertise, PCB design and verification, embedded controls, high-speed signaling, power electronics, prototyping, and strong collaboration skills. U.S. work authorization required.
Altium, Jira
1w
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
3w
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Applications Engineering Consultant – FPGA Prototyping Justification - Job Detail | Careers Marketplace - Siemens
Austin or Fremont or San Diego or Santa Clara or Tempe or Wilsonville
$147k-$293k/yr HybridFull Time
7+ YOE7+ years in design/verification/simulation/emulation/prototyping or applications engineering; BS/MS in EE/CE/CS; experience with SystemVerilog/Verilog/VHDL, FPGA/ASIC flows, scripting (Perl/Python/shell), and FPGA tools (proFPGA, HAPS, Vivado, Quartus).
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, shell, Makefiles, XML, JSON, Questa, Incisive, VCS, OVM, UVM, proFPGA, HAPS, Xilinx Vivado, Altera Quartus
1w
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Senior/Principal R&D Digital Systems Security, Hybrid
Albuquerque or Livermore
$140k-$281k/yr HybridFull Time
5+ YOEBachelor's plus 5 years relevant experience (or equivalent), ability to obtain DOE Q-level clearance, expertise in hardware/software security, formal methods, and familiarity with secure-system design and verification.
RocQ, Lean, C, C++, Java, Python, Rust, Assembly, ASIC, FPGA, NIST, CNSS
3w
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Applications Engineering Consultant - Emulation - Job Detail | Careers Marketplace - Siemens
Fremont or San Diego or Santa Clara or Tempe or Wilsonville
$147k-$293k/yr HybridFull Time
7+ YOE7+ years in chip/system design, verification, simulation or emulation; BS/MS in EE/CE/CS; knowledge of SystemVerilog/Verilog/VHDL, C/C++, SystemC; experience with Veloce/Palladium/ZeBu and simulation tools; scripting (Python, Perl, sed, awk, Tcl/Tk, sh); strong communication; willing to travel ~10%.
SystemVerilog, Verilog, VHDL, C, C++, SystemC, Veloce Strato, Veloce, Palladium, ZeBu, Questa, Incisive, VCS, OVM, UVM, Python, Perl, sed, awk, Tcl/Tk, sh, APIs