Lightmatter: Develops photonic processors and interconnects for AI data centers
13+ YOEBachelor's in Electrical Engineering, 13+ years DFT experience on ASICs, 2+ tapeouts, experience with DFT CAD/ATPG, Python/TCL scripting, post-silicon bring-up and ATE interfacing.
Lightmatter: Develops photonic processors and interconnects for AI data centers
5+ YOEBachelor's in EE/CE,5+ years DFT experience for advanced ASICs,pre- and post-silicon validation,Python/TCL scripting,Verilog,knowledge of scan/ATPG/MBIST/JTAG and commercial EDA DFT tools.
Expedition Medicines: Develops covalent small molecule drugs using generative AI.
2+ YOEPh.D. (2+ yrs industry) or M.S. (6+ yrs) in ML/computational chemistry/CS/applied math; expertise in molecular ML, quantum chemistry/DFT, generative models; Python and PyTorch experience; data curation and cross-functional collaboration.
Dayhoff Labs: AI-driven discovery for synthetic biology and chemical processes.
PhD in computational/theoretical chemistry with catalytic focus, first-author publications, production quantum-chemistry package fluency, DFT and kinetics expertise, Python and computational-chemistry stack experience.
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
5+ YOEBachelors in Engineering with 5+ years or Masters in Engineering with 3+ years in ASIC physical design; experience with floorplanning, place-and-route, STA, timing closure, DFT collaboration, scripting, and design flow optimization.
Flagship Pioneering: Conceives, creates, and builds life science platform companies
2+ YOEPh.D. (2+ yrs industry) or M.S. (6+ yrs) with expertise in molecular ML, quantum chemistry/DFT, generative models; proficiency in Python and modern ML frameworks; experience integrating computational and experimental data.
Principal Technical Engineer 3rd Party IP Engineer
Morrisville or Austin or New York or Burlington or Westborough or Boise
$152k-$225k/yrOnsiteFull Time
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
3+ YOEBachelor’s in CS/EE with 5-10 years or Master/PhD with 3-5 years; deep DDR/LPDDR/GDDR/HBM/eMMC interface knowledge, ASIC design flow experience, 3rd-party IP management, project and customer communication skills.