8 digital design engineer jobs at 4 companies in Galt, CA
1w
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MTS, AI Optimized Memory Digital Design Engineer
Folsom or Richardson
$175k-$309k/yr OnsiteFull Time
Bachelor's in CS/CE/EE, strong digital design and microarchitecture experience, SystemVerilog proficiency, synthesis and PPA optimization experience, and programming in C/C++/Python.
SystemVerilog, C, C++, Python, Agentic AI
1d
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Senior Staff Digital Design Power Engineer
Folsom, California, United States
$170k-$246k/yr OnsiteFull Time
6+ YOEMaster's degree in electrical engineering, computer engineering, computer science, or related field, plus six years of related experience and expertise in VLSI development, RTL design, synthesis, and physical design.
VLSI, RTL
2mo
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Member of Technical Staff, AI‑Optimized Memory Digital Design Engineer / Microarchitect
Folsom or Richardson
$177k-$309k/yr OnsiteFull Time
5+ YOESenior digital/microarchitecture engineer with 5+ years delivering silicon-demonstrated memory/SoC designs; SystemVerilog RTL design, synthesis and PPA optimization; experience with C/C++ or Python; strong memory system architecture knowledge.
SystemVerilog, C/C++, Python
1w
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MTS, AI Optimized Memory Digital Design Engineer
Folsom or Richardson
$175k-$309k/yr OnsiteFull Time
Bachelor's in CS/CE/EE, strong digital design and microarchitecture experience, SystemVerilog and programming (C/C++/Python) proficiency, synthesis and PPA experience, and experience delivering silicon-proven designs.
SystemVerilog, C, C++, Python, Agentic AI
3mo
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SMTS Analog Design Engineer, Mixed-Signal PHY (Clocking & High-Speed I/O)
Boise or Folsom or Richardson or San Jose
$159k-$347k/yr OnsiteFull Time
10+ YOEBS/MS/PhD in EE; 10+ years analog/mixed-signal IC design with tape-out; deep clocking (PLL/DLL/CDR) expertise; transistor-level simulation with HSpice; strong jitter analysis and analog-digital interface experience.
HSpice, Verilog-AMS, Real-number modeling (RNM)
2mo
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Member of Technical Staff, AI‑Optimized Memory Digital Design Engineer / Microarchitect
Folsom or Richardson
$177k-$309k/yr OnsiteFull Time
5+ YOE5+ years of digital design and memory systems experience; strong microarchitecture knowledge; proficiency in SystemVerilog, C/C++, Python; ability to drive data-driven architectural decisions.
SystemVerilog, C/C++, Python, Synthesis tools
5d
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Electronics Engineer II
Rancho Cordova, California, United States
$80k-$85k/yr OnsiteFull Time
5+ YOEBachelor's degree in electronic engineering with 5+ years of engineering experience, or associate degree with 9+ years. Requires PCB design, electronic testing, troubleshooting, analog/digital/embedded design, and communication skills.
PCAD, Altium, AutoCAD, VHDL, PCB, oscilloscope, DVM, Logic analyzers
3mo
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Senior Electrical Engineer
Irving or Bronx or Sacramento or Dallas
$125k-$135k/yr OnsiteFull Time
10+ YOE10+ years electrical engineering; analog/digital circuit design; up to 600VAC; PCB layout; Ethernet/CAN/RS232; elevator domain knowledge.
Altium, Embedded C, FPGA, CAN, Ethernet, RS232/422