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Digital Design Engineer
Austin or Greensboro or Chandler
HybridFull Time
2+ YOEDegree in Electrical or Computer Engineering; 2+ years digital IC design; Verilog RTL; digital design flow; state machines; CMOS VLSI knowledge; strong problem solving.
Verilog, UVM, MATLAB, Simulink
3w
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Digital Design Engineer
Santa Clara, California, United States
$147k-$161k/yr OnsiteFull Time
Engineering fundamentals in high-speed digital and baseband design, signal integrity analysis, platform hardware design, integration and test; Master's degree in EE/CE/CS acceptable.
CAD
2mo
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Digital Design Engineer
Huntsville, Alabama, United States
$112k-$185k/yr OnsiteFull Time
3+ YOE3+ years digital circuit design experience; bachelor's degree in engineering or related field; ability to obtain US security clearance.
LTSpice
2mo
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Digital Design Engineer
Huntsville, Alabama, United States
$112k-$185k/yr OnsiteFull Time
3+ YOE3+ years experience in digital circuit design; BS in engineering or related field; U.S. citizenship and ability to obtain security clearance.
LTSpice, Mentor Graphics Expedition, Siemens, FPGA, SoC, PCIe, DDR3/4, Ethernet, Signal integrity
2mo
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Digital Design Engineer
Huntsville, Alabama, United States
OnsiteFull Time
5+ YOEABET-accredited BS in electrical engineering or related field; 5+ years engineering experience; digital design proficiency; VHDL/Verilog; ~10% travel; ability to obtain DoD clearance.
VHDL, Verilog, Altium Designer, Spice
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Digital Design Engineer
Tucson, Arizona, United States
$90k-$100k/yr OnsiteContract, Full Time
5+ YOEBachelor’s in Electrical or Computer Engineering; 5+ years digital circuit design; experience with processors, FPGAs, memory; active U.S. security clearance; U.S. citizenship; ability to obtain SAP clearance.
Mentor Graphics, Siemens EDA, Xilinx Vivado, HyperLynx, Xpedition
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Digital Design Engineer
Saratoga, California, United States
$150k-$250k/yr OnsiteFull Time
Design digital avionics boards, high-speed interfaces, clocking, power budgeting, radiation-tolerant design; collaborate with FPGA teams; board bring-up and design reviews.
Altium Designer, HyperLynx SI, HyperLynx PI, Full-Wave, SPICE-based circuit simulation, FPGA vendor toolchains
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Digital Design Engineer
San Diego, California, United States
$190k-$220k/yr OnsiteFull Time
8+ YOELead digital design and verification, RTL synthesis, low-power audio processing, 8+ years in digital blocks for high-performance mixed-signal ICs; strong EDA (Cadence) knowledge.
Cadence, Conformal, Genus, Tempus
2mo
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Senior Digital Design Engineer
Rochester, New York, United States
$105k-$231k/yr OnsiteFull Time
10+ YOEBS in Electrical Engineering, 10+ years digital electronics design experience, US citizenship and ability to obtain security clearance, PCB/schematic design, high-speed digital interfaces, lab test equipment experience, strong communication skills.
Siemens PADS, VHDL, Verilog, Logic Analyzer, Signal Generator, Oscilloscope, Protocol Analyzer, Spectrum Analyzer, Network Analyzer, USB3.x, Ethernet, PCIe, I2C, SPI
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Digital Design Engineer
San Jose, California, United States
$130k-$200k/yr OnsiteFull Time
5+ YOEBS/MS/PhD in EE/CE,5+ years digital RTL design experience,SystemVerilog proficiency,ASIC flow and EDA tool experience,high-speed SerDes/DSP knowledge,Python/MATLAB/C++ familiarity.
System Verilog, Synopsys, Cadence, Siemens, Python, MATLAB, C++
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Senior Digital Design Engineer
Chandler, Arizona, United States
OnsiteFull Time
3+ YOEMaster's degree in Electrical Engineering with emphasis on Digital Design; 3+ years in digital design/architecture; willing to relocate to Chandler/Phoenix area; strong problem solving and teamwork.
Verilog, SystemVerilog, HDL, Synthesis, STA, DFT
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Senior Digital Design Engineer
Santa Clara or Austin or Redmond
$136k-$265k/yr OnsiteFull Time
5+ YOE5+ years experience in digital/ASIC design, degree in EE/CE or equivalent, experience with high-speed protocols (NVLink, PCI-Express, Ethernet, UCIE), RTL implementation, and ASIC design flows.
NVLink, PCI-Express, Ethernet, UCIE, RTL
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Senior Digital Design Engineer
Rochester, New York, United States
$105k-$231k/yr OnsiteFull Time
10+ YOEBS in Electrical Engineering; 10+ years in digital electronics; PCB design; high-speed digital circuits; USB3.x, Ethernet, PCIe; lab equipment proficiency; strong communication skills.
Schematic capture, PCB layout, HDL (Verilog/VHDL), Siemens PADS, Lab equipment
2w
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Digital Layout Design Engineer
Austin, Texas, United States
OnsiteFull Time
Design custom digital layouts and macros for ASICs at advanced technology nodes; collaborate with integration, CAD, circuit, and technology engineering teams.
CAD
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Staff Digital Design Engineer
San Diego, California, United States
$139k-$232k/yr OnsiteFull Time
6+ YOEDesign digital subsystems for phased array and communication systems; RTL/SystemVerilog; SoC integration; embedded software in C; timing analysis; ECOs; SPI/QSPI and high-speed serial interfaces; Bachelor's or Master's in Electrical Engineering; 6+ years digital ASIC/SoC design.
SystemVerilog, Verilog, C, SPI, QSPI, JESD204B/C, Synthesis, Place-and-Route, UVM, ECOs, RISC-V, embedded software
1mo
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Principal Engineer, Digital Design Engineering
Chandler or Wilmington
$152k-$227k/yr OnsiteFull Time
12+ YOE12+ years in digital design engineering with SoC architecture expertise, multi-domain technical mastery, ability to define technical strategy, lead architecture, drive innovation, mentor engineers, and engage with customers and industry.
2w
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Toolchain / Digital Design Engineer
Lincolnton, Georgia, United States
HybridPart Time
B.S. or M.S. in EE/CE/CS; demonstrated expertise with EDA toolchains, RTL design (Verilog/SystemVerilog/VHDL), digital logic synthesis, and scripting (Python, C++, Rust). Must be a US Person eligible for defense work.
EDA, RTL, Verilog, SystemVerilog, VHDL, Python, C++, Rust
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AI Silicon, Digital Design Engineer
Palo Alto, California, United States
OnsiteFull Time
8+ YOEB.S. or M.S. in EE/Computer Engineering, 8+ years ASIC/SoC digital design experience, Verilog RTL expertise, EDA tool proficiency, synthesis/timing/LEC experience, and mentorship/communication skills.
Verilog, RTL, EDA tools, Logical Equivalence Checking (LEC), Clock Domain Crossing (CDC), Reset Domain Crossing (RDC)
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Principal Digital Design Engineer
Duluth, Georgia, United States
OnsiteFull Time
12+ YOE12+ years ASIC/IC digital design experience; Bachelor’s or Master’s in EE/CE/CS; fluent in Verilog RTL; expertise in synthesis, static timing analysis, DFT, CDC/RDC, ATPG/ATE, and gate-level verification.
Verilog, DFT, CDC, RDC, ATPG, ATE
1mo
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Digital Design Engineer
Manassas, Virginia, United States
$135k-$150k/yr OnsiteFull Time
5+ YOEBachelor's in Electrical or Computer Engineering with 5+ years experience; or Master's with 3+ years; US citizenship; DoD Secret clearance.
FPGA, Verilog, VHDL, SystemVerilog, Embedded C
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