6 digital design engineer jobs at 3 companies in Seaside, CA
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RTL Design Engineer
San Jose, California, United States
HybridFull Time
Experience in RTL digital design and verification, Verilog/System Verilog, scripting (Perl/Tcl/Python), FPGA/SoC design concepts, and strong analytical and communication skills; Bachelor’s or Master’s in Computer or Electrical Engineering.
Verilog, System Verilog, Perl, Tcl, Python
1w
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PLL Design/ Integration Staff Engineer - Adaptive Computing Group
San Jose, California, United States
$146k-$250k/yr HybridFull Time
Strong IC design and manufacturing background with analog/digital IP integration (PLLs, LDOs), post-silicon validation experience, SystemVerilog modeling, Vivado or similar tool experience; MS preferred.
Vivado, SystemVerilog
2mo
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Director Silicon Design Engineering
San Jose, California, United States
HybridFull Time
15+ YOE5+ Mgmt15+ years ASIC/semiconductor leadership; strong hands-on design and program management; FPGA experience a plus; deep ASIC development lifecycle knowledge.
RTL, ASIC, Analog Design, Digital Design, Tapeout, Post-Silicon Validation
3w
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Electrical Engineer
Marina or Monterey
$95k-$112k/yr OnsiteFull Time
2+ YOE2–4 years electrical engineering experience in instrumentation or industrial electronics; schematic capture and PCB support, microcontrollers, analog/digital design, prototyping, soldering, troubleshooting, BOM and ECO knowledge.
Microsoft Excel, Microsoft Outlook, Microsoft Word, Altium Designer, PADS, Epicor, ERP, MRP, ECAD
3mo
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Methodology Engineer – Static RTL Verification
San Jose, California, United States
OnsiteFull Time
Experience with digital design, SystemVerilog, RTL static checks; collaboration across teams; strong problem-solving and communication skills.
SystemVerilog, UPF, Python, Perl, Tcl, Shell, Linux, Verilog, VHDL
1mo
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Sr. Hardware Engineer - ML Acceleration, Annapurna Labs
Austin or Cupertino
$159k-$248k/yr OnsiteFull Time
7+ YOE7+ years ASIC, digital and analog/RF design, verification and physical design experience; experience with UVM, C/SystemC, MATLAB/Python/C++; emulation, post-silicon validation, and SOC bring-up experience; BS in EE required.
UVM, C, System C, MATLAB, Python, C++, Pearl, Git, CI/CD, SPI, I2C, I3C, UART