3mo
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Area Digital Delivery Manager
Dallas or San Antonio or Round Rock or Austin or Houston or Texas or Mississippi or Louisiana or Oklahoma or Arkansas
FieldFull Time
5+ YOEManage and grow regional Digital Delivery/BIM practice; standardize VDC/BIM workflows; lead BIM management on large infrastructure projects; 5+ years digital design and 3+ years digital delivery experience; advanced 3D software and coordination tool skills.
Civil3D, Revit, Microstation, OpenRoads Designer, Navisworks, BIM360, Bentley Infrastructure Cloud/iTwins, Synchro, Assemble, ProjectWise, Autodesk Construction Cloud, Microsoft Office
1w
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Sr Field Applications Engineer
Denver or Round Rock
$110k-$180k/yr FieldFull Time
5+ YOE5+ years in power electronics applications or design, Bachelor’s in Electrical Engineering, strong communication, problem-solving, lab debug and qualification experience, familiarity with digital buses and firmware.
I2C
2w
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Electrical Principal Engineer- FPGA Development
Round Rock, Texas, United States
$145k-$187k/yr OnsiteFull Time
10+ YOE10+ years industry experience with product development from concept to production; advanced PCBA and HDL (Verilog/System Verilog) skills; RTL design and simulation; analog and digital design fundamentals; hardware/software interaction knowledge.
Verilog, System Verilog, HDL, RTL, Lattice, Xilinx, Altera, Synopsys VCS, Python, Batch, Git
2mo
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Senior Electrical Engineer- FPGA Development
Round Rock, Texas, United States
$110k-$151k/yr OnsiteFull Time
6+ YOE6+ years in product development from concept through production; strong PCBA, HDL/RTL knowledge, Verilog/SystemVerilog; analog/digital design; holds hardware/software interaction expertise.
Verilog, SystemVerilog, HDL, Python, Git, Lattice, Xilinx, Altera, Synopsys VCS
1mo
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Senior Principal Electrical Engineer - FPGA Development
Round Rock, Texas, United States
$174k-$226k/yr OnsiteFull Time
12+ YOE12+ years product development experience; advanced FPGA technologies, Verilog/SystemVerilog and HDL coding; RTL design and simulation; strong analog and digital fundamentals; hardware-software integration. Toolchain experience (Lattice/Xilinx/Altera, Synopsys VCS), Python and Git preferred.
Verilog, SystemVerilog, HDL, RTL, Lattice, Xilinx, Altera, Synopsys VCS, Python, Batch, Git