210 digital designer jobs at 76 companies in Lathrop, CA
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Digital Designer
San Jose, California, United States
$82k-$102k/yr OnsiteFull Time
3+ YOE3+ years designing print, digital or video; strong Adobe Creative Suite skills including After Effects; Final Cut Pro; Microsoft Office; excellent communication; Bachelor's in design preferred.
Adobe Creative Suite, After Effects, Microsoft Office Suite, Final Cut Pro
1mo
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Senior Digital Product Designer, Design Systems
Milpitas, California, United States
$121k-$206k/yr HybridFull Time
6+ YOE6+ years product design with 2+ years in design systems, expertise in design tokens/component architecture, accessibility-first approach, experience partnering with engineers, advanced Figma skills, Bachelor's in design/HCI or related.
Figma
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Designer
Albany or Arlington or Atlanta or Austin or Beaverton or Bentonville or Boston or Brooklyn or Carmel or Charlotte or Chicago or Cincinnati or Cleveland or Columbus or Culver City or Denver or Des Moines or Detroit or Hartford or Herndon or Houston or Irvine or Irving or Kirkland or Miami or Milwaukee or Minneapolis or Morristown or Mountain View or Nashville or New York City or Oklahoma City or Overland Park or Philadelphia or Pittsburgh or Raleigh or Redmond or Sacramento or San Diego or San Francisco or Scottsdale or Seattle or St. Louis or St. Petersburg or Walnut Creek or United States
$24-$78/hr HybridFull Time
2+ YOEPortfolio demonstrating digital product design; preferred skills include complex problem solving, design strategy, visual and motion design, presenting findings, collaboration, communication, and prototyping tools.
prototyping tools
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Sr Designer
Dublin, California, United States
$116k-$130k/yr OnsiteFull Time
8+ YOESenior Designer with 8+ years in graphic design; strong portfolio; expert in Adobe CC; digital and print design; bachelor’s in graphic or visual design; excellent communication and collaboration.
Adobe Creative Cloud, Photoshop, Illustrator, InDesign, Sketch, Figma
1mo
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Graphic Designer
Long Beach or Los Angeles or Carpinteria or Berkeley or Santa Ana or Santa Barbara or Lompoc or Goleta or Turlock or Palm Desert or Camarillo
$72k-$78k/yr OnsiteFull Time
3+ YOE3+ years graphic design experience, strong portfolio across print and digital, hand-drawn illustration skills, advanced Adobe Creative Suite proficiency, production and prepress knowledge, strong communication and time-management.
Adobe Creative Suite, Photoshop, Illustrator, InDesign, After Effects, Adobe XD
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Senior Product Visual Designer, Product Infrastructure (Multiple Positions)
San Jose or Los Angeles or New York City or London or Dublin or Paris or Berlin or Dubai or Jakarta or Seoul or Tokyo
$236k-$360k/yr OnsiteFull Time
4+ YOEMaster's plus 4 years or bachelor's plus 6 years in a related design field; 4 years with design projects, visual concepts, UX analysis, digital tools, front-end collaboration, and design guidelines.
Procreate, Boords, Adobe Illustrator, Figma, Photoshop, InDesign, After Effects
2w
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Digital Design Engineer
San Jose, California, United States
$166k-$229k/yr OnsiteFull Time
Master's degree in electrical, electronics, or computer engineering required. Requires C/C++ or Python, Verilog, VLSI design, signal processing, digital and analog IC design, design automation, and computer architecture knowledge.
C, C++, Python, Verilog
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Senior Digital Design Engineer
Santa Clara or Austin or Redmond
$136k-$265k/yr OnsiteFull Time
5+ YOE5+ years experience in digital/ASIC design, degree in EE/CE or equivalent, experience with high-speed protocols (NVLink, PCI-Express, Ethernet, UCIE), RTL implementation, and ASIC design flows.
NVLink, PCI-Express, Ethernet, UCIE, RTL
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Digital Design Engineer
San Jose, California, United States
$130k-$200k/yr OnsiteFull Time
5+ YOEBS/MS/PhD in EE/CE,5+ years digital RTL design experience,SystemVerilog proficiency,ASIC flow and EDA tool experience,high-speed SerDes/DSP knowledge,Python/MATLAB/C++ familiarity.
System Verilog, Synopsys, Cadence, Siemens, Python, MATLAB, C++
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Digital Assets Manager
New York City or Milwaukee or Dallas or Columbus or Kirkland or Cincinnati or Cleveland or Oklahoma City or Austin or Albany or Chicago or St. Petersburg or Hartford or Pittsburgh or St. Louis or Miami or Sacramento or Raleigh or Minneapolis or Mountain View or Scottsdale or San Francisco or Morristown or Denver or Boston or Philadelphia or Des Moines or Overland Park or Los Angeles or Charlotte or Walnut Creek or Carmel or Seattle or Houston or Arlington or Atlanta or Redmond or Bentonville or Beaverton or Nashville or Detroit or San Diego
$80k-$294k/yr FieldFull Time
5+ YOE5+ years consulting and digital assets experience in financial services, engagement management, operating model/governance design, and business development; Bachelor’s degree required.
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Associate Digital Design Engineer
San Jose, California, United States
$86k-$118k/yr OnsiteFull Time
0+ YOEBachelor's or master's degree in electrical or computer engineering preferred; 0–2 years' digital design experience; Verilog/SystemVerilog, RTL, simulation, verification, synthesis, and analytical skills.
Verilog, SystemVerilog, RTL, Python, Perl, Tcl, Shell
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Digital IC Design Engineer
Santa Clara, California, United States
$172k-$269k/yr OnsiteFull Time
10+ YOERequires BSEE with 12 years or MSEE with 10 years of digital/mixed-signal ASIC architecture and design experience, multiple device tape-outs, digital logic, ASIC flow, Verilog, and analog IC knowledge.
Verilog, SystemVerilog, Xcelium, Perl, Tcl, Python, MATLAB, UVM, FPGA, Palladium, DisplayPort, MIPI C-PHY, MIPI D-PHY, I2C, SPI, HDCP, DSC, STA, RTL, GDSII, ASIC, PLL, SerDes, CDC
1mo
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Digital Layout Design Engineer
Santa Clara, California, United States
OnsiteFull Time
Design custom digital macros and libraries for ASICs at advanced technology nodes; collaborate with integration, CAD, circuit, and technology engineering teams.
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RTL Designer – Physical AI Compute
Santa Clara, California, United States
$125k-$500k/yr OnsiteFull Time
Experience designing RTL for complex digital systems with Verilog/SystemVerilog, strong computer architecture and microarchitecture knowledge, and hardware/software co-design experience.
Verilog, SystemVerilog, FPGA
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PMTS ASIC Digital Design IP ENGINEERING
Santa Clara, California, United States
$167k-$275k/yr OnsiteFull Time
12+ YOEBachelor's or master's degree in electrical or computer engineering, 12+ years of processor or complex SoC digital design, expert Verilog/SystemVerilog, and expertise in microarchitecture, synthesis, timing, CDC, RDC, and low-power design.
Verilog, SystemVerilog, RISC-V, ARM, MIPS, ARC, ISO 26262, DO-254, EDA
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Senior HSIO Digital Design Engineer
San Jose, California, United States
$138k-$206k/yr OnsiteFull Time
3+ YOE3+ years industry experience in digital HSIO or die-to-die interfaces; BS/MS/PhD in Electrical Engineering with specified experience; knowledge of high-speed serial protocols, SI/PI, and digital/analog co-design.
AXI, CHI, CXS.B, CXL, PCIE, UA-Link
2mo
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Technical Staff Engineer - Digital Design
San Jose, California, United States
$70k-$143k/yr HybridFull Time
12+ YOEBachelor's in EE/CE, 12+ years relevant experience (10+ in FPGA/ASIC IP and system design), VHDL/Verilog expertise, FPGA design/verification experience, strong digital design and architecture knowledge, excellent communication; US citizenship or permanent residency required.
VHDL, Verilog, Libero, Quartus, Vivado, Identify Debugger, SignalTap, ChipScope, ModelSim, QuestaSim, Python, TCL
2w
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PMTS ASIC Digital Design IP ENGINEERING
Santa Clara, California, United States
$167k-$275k/yr OnsiteFull Time
12+ YOEBachelor's or master's degree in electrical or computer engineering; 12+ years in processor, CPU, DSP, or complex SoC digital design; expert Verilog/SystemVerilog and processor microarchitecture expertise.
Verilog, SystemVerilog, EDA
1mo
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Manager, Digital Transformation - Design Quality
Fremont, California, United States
$114k-$253k/yr OnsiteFull Time
6+ Mgmt6+ years management experience; bachelor’s degree or equivalent experience; experience in engineering or consulting, quality/process design, digital transformation, change management, and product development quality techniques.
Pareto Analysis, Root Cause Analysis, Statistical Process Control, FMEA
1mo
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Senior RTL Designer - Interconnect/NoC Design
San Jose or United States
HybridFull Time
8+ YOEBS/MS in EE/CE or equivalent,8+ years digital IC design with 4+ years owning on-chip interconnect/NoC; SystemVerilog skills; experience with AXI/CHI/ACE, CDC, top-level integration, and register-map flows.
SystemVerilog, SystemRDL, IP-XACT, AXI4, AXI4-Lite, AXI-Stream, CHI, ACE
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