14 digital verification engineer jobs at 8 companies in San Diego, CA
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Principal/ Sr. Principal Digital Verification Engineer
San Diego, California, United States
$125k-$235k/yr OnsiteFull Time
5+ YOEUS citizen able to obtain Secret clearance. Bachelor’s in EE or STEM required. 5+ years digital verification experience (Principal) or 8+ years (Sr. Principal). VHDL, FPGA verification, Siemens Questa, verification planning, and simulation/debug skills.
VHDL, FPGA, Siemens Questa Simulator, OSVVM, Perl, TCL, Bash, Makefile, Linux, Siemens Lint, Siemens Inspect, Siemens CDC
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Design Verification Engineer
Broomfield or San Diego or Fort Collins or San Jose or Irvine
$144k-$230k/yr OnsiteFull Time
10+ YOE12+ years verification experience for complex digital and mixed-signal circuits; proficiency with SystemVerilog/UVM/SVA, scripting, simulation tools, and RTL/gate-level debug; BS/MS in EE/CE.
SystemVerilog, UVM, SVA, Synopsys, Cadence, Mentor, Perl, Python, Tcl, DesignSync, git, Palladium, Veloce, Zebu, Xilinx, ICL, PDL, Tessent
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Processor Design Verification Engineer
San Diego, California, United States
$127k-$191k/yr OnsiteFull Time
2+ YOEBachelor's in EE/CS/CE (or higher), 2+ years digital/processor design verification experience, strong SystemVerilog testbench knowledge, excellent programming/OOP skills, and understanding of processor subsystems.
SystemVerilog
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Sr. Principal Digital Design Verification Lead
San Diego, California, United States
$142k-$213k/yr HybridFull Time
5+ YOE5+ years FPGA verification experience, strong SystemVerilog/UVM skills, Questa/ModelSim experience, RTL knowledge (Verilog/VHDL), scripting (Python/Tcl/Bash), Git, and ability to obtain US Secret clearance and Program Access.
SystemVerilog, UVM, Questa, ModelSim, Verilog, VHDL, SVA, Python, Tcl, Bash, Git
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Principal Engineer Digital
San Diego, California, United States
$125k-$188k/yr OnsiteFull Time
4+ YOERequires an engineering degree, FPGA design and verification experience with VHDL, EDA tool experience, board or system debugging, and ability to obtain and maintain a Secret clearance.
VHDL, AMD, Intel, Electronic Design Automation (EDA), Vivado, Quartus, Questa Simulator, FPGA
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Sr. Digital Engineer- MBSE
San Diego, California, United States
OnsiteFull Time
5+ YOEActive TS/SCI clearance, US citizenship, graduate degree with relevant years of experience (Bachelors+5/Masters+3/PhD+1), MBSE expertise (Cameo/MagicDraw, Rhapsody, SysML), and experience in systems architecture, CONOPS, verification.
Cameo/MagicDraw, Rhapsody, SysML, UPDM, UML, UAF, ModelCenter, AFSIM, SIMULIA, DNG, RQM, MATLAB, STK, Aras Innovator, Phoenix ModelCenter
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Principal /Sr. Principal Digital Engineer
San Diego, California, United States
OnsiteFull Time
5+ YOEBSEE/BSCE (or advanced degree) with 5+ years (Principal) or 8+ years (Sr. Principal) experience; hands-on VHDL FPGA design, verification, simulation and testing; Vivado, Quartus, Questa Simulator experience; board/system debug; ability to obtain US Secret clearance.
Electronic Design Automation (EDA) Tools, Vivado, Quartus, Questa Simulator, VHDL
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Senior Principal Engineer Digital ASIC Design/Manager
San Diego, California, United States
$214k-$348k/yr OnsiteFull Time
15+ YOEBS or MS in Electrical Engineering; 15 years in Digital ASIC design; leadership; cross-functional collaboration; RTL/verification; experience with mixed-signal interfaces is a plus.
Verilog, SystemVerilog, LINT, LEC, RDC/CDC, SDF, Genus, Conformal, Innovus, Spyglass Lint, TetraMax, Xcelium, Cadence, Synopsys PrimeTime, VCS, UGV, UVM
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Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer
San Diego, California, United States
$140k-$210k/yr OnsiteFull Time
4+ YOEBachelor's (or advanced) degree in engineering/CS, 3–4+ years ASIC/RTL design or verification experience; skills in Verilog/SystemVerilog, Synopsys synthesis, low-power design, C/C++/Python, computer architecture and RTL microarchitecture.
Verilog, SystemVerilog, Synopsys, C, C++, Python
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Systems Engineer
Colorado Springs or San Diego
$90k-$120k/yr OnsiteFull Time
2+ YOE2+ years digital systems design and integration experience; proficiency in MBSE, SysML/UML and Cameo; experience with requirements analysis, verification planning, CONOPS, and DE collaboration; bachelor’s degree required; active SECRET clearance.
Cameo Systems Modeler, SysML, UML, Confluence, JIRA, Python, JavaScript
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Experienced Engineer - SOC Power Architecture
San Diego, California, United States
$179k-$268k/yr OnsiteFull Time
4+ YOEDegree in CE/CS/EE plus 4–6+ years engineering experience; strong background in low-power system design, digital logic, ASIC flow, power modeling/verification, and camera/video systems.
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Front-End Design Engineer
San Diego, California, United States
$116k-$173k/yr OnsiteFull Time
2+ YOERTL design and verification of digital IPs; Bachelor's in EE or related with 2+ years (or Master's 1+ / PhD); experience with SystemVerilog, UVM/OVM, SystemC, Verilog, Python/Perl, synthesis/STA and low-power design.
System Verilog, UVM, OVM, System C, Python, Verilog, Perl
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Electrical Engineer, ASIC Program Lead-CA
San Diego, California, United States
$160k-$200k/yr OnsiteFull Time
12+ YOE12+ years experience with end-to-end custom ASIC/SoC development, mixed-signal and analog front-end expertise, strong digital design and verification experience, EE degree (BS required, MS preferred), lab debugging skills, and cross-functional collaboration.
Verilog, VHDL, SystemVerilog, UVM, EDA tools, Python, MATLAB, C/C++, Tcl, oscilloscopes, logic analyzers, spectrum analyzers, signal generators, precision measurement equipment, custom test fixtures
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Field Application Engineer – PowerPro - Job Detail | Careers Marketplace - Siemens
Austin or Costa Mesa or Santa Clara or San Diego
$147k-$293k/yr HybridFull Time
Strong RTL design experience (Verilog/SystemVerilog/VHDL), knowledge of digital design and synthesis/verification flows, RTL power analysis experience, scripting (Tcl, Python), BS/MS in EE/CS or related field, strong communication and problem-solving skills.
PowerPro, Verilog, SystemVerilog, VHDL, Tcl, Python, PrimePower, PowerArtist, UPF, CPF, Microsoft Copilot, OpenAI APIs