1mo
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CAD/EDA Manager
San Jose or Austin or San Mateo
$220k-$255k/yr OnsiteFull Time
8+ YOE8+ years in analog/mixed-signal IC CAD/EDA engineering, B.S./M.S. in EE/CE, expertise with Cadence Virtuoso, Spectre, Calibre, PDK integration (TSMC N3P/N2P), SKILL/Tcl/Python scripting, Linux/HPC, and EDA license management.
Cadence Virtuoso, Spectre, Spectre X, Mentor Calibre, Synopsys IC Validator, SKILL, Tcl, Python, Perl, shell, Git, Vault, ClearCase, LSF, FlexLM, RLM, OpenAccess, Virtuoso Layout Suite XL, Virtuoso RF, EMIR, Voltus, RedHawk, SOS, JIRA, Confluence, Linux, Unix, HPC
2mo
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EDA License Engineer
Santa Clara or Westford or Austin or Durham
$152k-$288k/yr HybridFull Time
5+ YOEFlexLM/FLEXnet licensing on Linux; Python/Shell scripting; 5+ years in a related field; Bachelor's in CS/Engineering; HA infrastructure experience; independent worker with good communication.
FlexLM, FLEXnet, Reprise License Manager, Linux (RHEL/CentOS), lmstat, Python, Shell, Ansible
1w
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EDA Computing / HPC Infrastructure MTS
Austin or Essex Junction
$104k-$175k/yr OnsiteFull Time
8+ YOE8+ years experience in EDA/HPC/Linux infrastructure, IBM LSF, storage and cloud; bachelor\u0002s in CS/Engineering/IT or equivalent; strong scripting and incident analysis skills.
IBM LSF, NFS, NetApp ONTAP, AWS FSx, AWS S3, ServiceNow, Python, Bash, RHEL, Calibre, ASML Brion, Cadence, Synopsys
1w
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EDA Computing / HPC Infrastructure MTS
Austin or Essex Junction
$104k-$175k/yr OnsiteFull Time
8+ YOEBachelor's in CS/Engineering or equivalent, 8+ years EDA/HPC/Linux infrastructure experience, IBM LSF and storage experience, Bash/Python skills, AWS and NetApp knowledge, strong incident analysis and communication.
IBM LSF, NFS, NetApp ONTAP, AWS FSx, S3, ServiceNow, Calibre, ASML Brion, Cadence, Synopsys, Python, Bash, RHEL, Linux, AWS
1mo
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EDA Tools Hardware Engineer
Santa Clara or Folsom or Hillsboro or Austin
$142k-$269k/yr HybridFull Time
2+ YOEDegree in computer/electrical engineering or CS plus relevant experience; expertise in physical design (placement, routing), clock tree synthesis, Innovus-based full‑chip integration; Linux scripting and STA/power analysis preferred.
Innovus, Linux
1mo
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Applied AI Engineer (EDA), Platform Architecture
Austin, Texas, United States
OnsiteFull Time
Develop and deploy agentic AI workflows to automate and optimize pre-silicon validation, bridging applied AI and EDA for silicon verification and simulation/emulation workflows.
Electronic Design Automation (EDA)
2w
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Software Engineering Director/Architect, 3DIC P&R & AI-driven EDA Automation
Austin, Texas, United States
OnsiteFull Time
Experience developing EDA software and automation for 3DIC/interposer/RDL flows; hands-on C++, Tcl, Python, Java; knowledge of constraint-driven design and large-scale designs; Bachelor’s or Master’s in CS/EE/CE or related.
C++, Tcl, Python, Java, Innovus, LLM
1mo
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CAD Design Engineer
Austin, Texas, United States
OnsiteFull Time
7+ YOEBachelor's in EE/CE/CS, 7+ years CAD/design automation or EDA tools experience, strong Python, Linux, revision control (Git/Perforce), EDA tool and IC flow knowledge, scripting and automation expertise.
Python, Git, Perforce, Linux, SKILL, Tcl, shell, Cadence, LSF, EDA, PDKs
2mo
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Semicustom DFT Strategy Lead
Austin, Texas, United States
HybridFull Time
Senior DFT and testing leader with cross-functional collaboration, roadmap development, and experience with EDA/ATE tools.
EDA tools, ATE tools, CAD tools, DFT tools, Internal DFT tools
3w
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Senior Staff ASIC CAD Flow Infrastructure Engineer
Austin, Texas, United States
$129k-$191k/yr OnsiteFull Time
5+ YOE5+ years ASIC CAD/EDA or infrastructure engineering experience, proficiency in Python, Tcl, Shell, Linux, experience supporting Synopsys/Cadence/Siemens EDA tools, strong ASIC/SoC design-flow knowledge, bachelor’s degree in CS/EE (advanced degree or equivalent experience acceptable).
Python, Tcl, Shell, Linux, Synopsys, Cadence, Siemens EDA, EDA
2mo
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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
Austin or Irvine or Sunnyvale
OnsiteFull Time
5+ YOEBachelor's in electrical/computer engineering or computer science; 5+ years ASIC/physical design experience; RTL2GDSII, EDA tools; scripting; ITAR awareness.
EDA tools, RTL2GDSII, Python, TCL, Perl, Shell
13h
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Head of Silicon CAD Austin
Austin, Texas, United States
HybridFull Time
Senior leader with deep FE/BE CAD expertise, proven experience scaling CAD orgs, driving methodology and automation, partnering with EDA vendors, and building AI-enabled silicon workflows.
AI, CI/CD, RTL, GDSII, STA, P&R, EDA
3mo
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Senior IP Design Engineer
Austin or San Diego
$129k-$204k/yr OnsiteFull Time
5+ YOE5+ years RTL design experience, proficiency in SystemVerilog and architectural modeling, knowledge of digital design and sign-off checks (LINT, CDC, CLP), familiarity with SDC/UPF and EDA flows.
SystemVerilog, RTL, LINT, CDC, CLP, SDC, UPF, EDA, Claude
1mo
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PD Engineer, Annapurna Labs
Austin, Texas, United States
$136k-$184k/yr OnsiteFull Time
Bachelor's in EE or related, expertise with EDA tools (Cadence, Mentor Graphics, Synopsys), deep understanding of physical sign-off activities, and experience driving RTL-to-GDS flows and physical implementation.
Cadence, Mentor Graphics, Synopsys, EDA, RTL, RTL2GDS, GDS
2mo
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Field Application Engineer, Software Sales
Austin, Texas, United States
$160k-$225k/yr HybridFull Time
5+ YOE5+ years in EDA/PCB design or CAD/CAE; strong Altium knowledge; excellent communication; pre/post-sales experience; bachelor’s in Electrical or Computer Engineering; advanced degree a plus.
Altium Designer, Altium 365, EDA tools, CAD/CAE
1d
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Field Application Engineer - proFPGA
Austin, Texas, United States
$147k-$293k/yr HybridFull Time
5+ YOEBachelor’s degree or equivalent with 5+ years experience, strong EDA tool knowledge, scripting/API integration experience, technical sales engagement, presentation and customer relationship skills; subject to U.S. export control requirements.
proFPGA, EDA tools, APIs
1mo
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Principal Engineer, Design Verification Engineering
Austin, Texas, United States
$198k-$251k/yr HybridFull Time
10+ YOEMaster's in EE/CE (or equivalent) and 10+ years verification experience; expertise in System Verilog, UVM/OVM, Verilog, C/C++, Perforce or Git, EDA tools, scripting (Python/Perl/Shell), and pre/post-silicon verification including ARM or RISC-V subsystems.
System Verilog, UVM, OVM, Verilog, C, C++, Perforce, Git, EDA tools, Python, Perl, Shell
3mo
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ASIC RTL Design Engineer (784246)
Austin, Texas, United States
HybridFull Time
3+ YOEBS in Electrical or Computer Engineering; several years of hands-on RTL design experience; strong digital logic; proficient in C/C++, TCL, Python; SystemVerilog/Verilog/VHDL; CDC/STA knowledge; RTL linting/CDC tools; AMBA experience; EDA tool familiarity; Git/Linux.
SystemVerilog, Verilog, VHDL, C, C++, Python, TCL, EDA tools, SpyGlass, AMBA, Cadence, Mentor, Synopsys, Git, Linux
1mo
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Lead CAD & Design Enablement Engineer
Austin, Texas, United States
OnsiteFull Time
5+ YOE5+ years supporting semiconductor design teams in CAD/EDA or silicon infrastructure roles; hands-on with Cadence, Synopsys, Siemens EDA (Mentor), or Ansys; scripting in Python, Tcl, Shell, or Perl; Linux/Unix and compute infrastructure experience.
Cadence, Synopsys, Siemens EDA (Mentor), Ansys, Python, Tcl, Shell, Perl, Linux/Unix
2mo
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Software Architect
San Diego or San Jose or Austin
OnsiteFull Time
10+ YOELead architecture of high-performance software solutions; 10+ years in semiconductor/EDA; system architecture, SoC design, and IP integration.
Verilog, VHDL, SystemVerilog, UVM, RTL design, simulation, emulation, cloud orchestration