189 eda engineer jobs at 34 companies in Manor, TX

3mo
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EDA Workflow Optimization Engineer
Santa Clara or Durham or Austin or Westford
$152k-$288k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
5+ YOE5+ years relevant experience; BS in CS or equivalent (MS preferred); strong UNIX systems and utilities expertise; Python/Shell automation; experience with EDA/ASIC/VLSI workflows, storage/network/compute architecture, data analysis, and strong communication.
UNIX, UNIX utilities, Python, Shell, C/C++, Perl, IBM Spectrum LSF, SLURM, GPU, EDA tools
1mo
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CAD/EDA Manager
San Jose or Austin or San Mateo
$220k-$255k/yr OnsiteFull Time
Neurophos
Neurophos: Develops high-performance photonic processors for AI inference acceleration.
8+ YOE8+ years in analog/mixed-signal IC CAD/EDA engineering, B.S./M.S. in EE/CE, expertise with Cadence Virtuoso, Spectre, Calibre, PDK integration (TSMC N3P/N2P), SKILL/Tcl/Python scripting, Linux/HPC, and EDA license management.
Cadence Virtuoso, Spectre, Spectre X, Mentor Calibre, Synopsys IC Validator, SKILL, Tcl, Python, Perl, shell, Git, Vault, ClearCase, LSF, FlexLM, RLM, OpenAccess, Virtuoso Layout Suite XL, Virtuoso RF, EMIR, Voltus, RedHawk, SOS, JIRA, Confluence, Linux, Unix, HPC
1mo
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EDA Tools Hardware Engineer
Santa Clara or Folsom or Hillsboro or Austin
$142k-$269k/yr HybridFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
2+ YOEDegree in computer/electrical engineering or CS plus relevant experience; expertise in physical design (placement, routing), clock tree synthesis, Innovus-based full‑chip integration; Linux scripting and STA/power analysis preferred.
Innovus, Linux
2mo
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EDA License Engineer
Santa Clara or Westford or Austin or Durham
$152k-$288k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
5+ YOEFlexLM/FLEXnet licensing on Linux; Python/Shell scripting; 5+ years in a related field; Bachelor's in CS/Engineering; HA infrastructure experience; independent worker with good communication.
FlexLM, FLEXnet, Reprise License Manager, Linux (RHEL/CentOS), lmstat, Python, Shell, Ansible
6d
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EDA Computing / HPC Infrastructure MTS
Austin or Essex Junction
$104k-$175k/yr OnsiteFull Time
GlobalFoundries
GlobalFoundriesNASDAQ: GFS: Manufacturer of semiconductors and provider of wafer fabrication services.
8+ YOE8+ years experience in EDA/HPC/Linux infrastructure, IBM LSF, storage and cloud; bachelor\u0002s in CS/Engineering/IT or equivalent; strong scripting and incident analysis skills.
IBM LSF, NFS, NetApp ONTAP, AWS FSx, AWS S3, ServiceNow, Python, Bash, RHEL, Calibre, ASML Brion, Cadence, Synopsys
6d
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EDA Computing / HPC Infrastructure MTS
Austin or Essex Junction
$104k-$175k/yr OnsiteFull Time
GlobalFoundries
GlobalFoundriesNASDAQ: GFS: Semiconductor foundry providing chip design and fabrication services.
8+ YOEBachelor's in CS/Engineering or equivalent, 8+ years EDA/HPC/Linux infrastructure experience, IBM LSF and storage experience, Bash/Python skills, AWS and NetApp knowledge, strong incident analysis and communication.
IBM LSF, NFS, NetApp ONTAP, AWS FSx, S3, ServiceNow, Calibre, ASML Brion, Cadence, Synopsys, Python, Bash, RHEL, Linux, AWS
1mo
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Applied AI Engineer (EDA), Platform Architecture
Austin, Texas, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Experience developing and deploying agentic AI workflows for automation and optimization of pre-silicon validation and EDA processes; strong engineering skills in AI and system-level verification.
Electronic Design Automation (EDA)
1mo
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CAD Design Engineer
Austin, Texas, United States
OnsiteFull Time
Cirrus Logic
Cirrus LogicNASDAQ: CRUS: Designs mixed-signal integrated circuits for consumer electronics.
7+ YOEBachelor's in EE/CE/CS, 7+ years CAD/design automation or EDA tools experience, strong Python, Linux, revision control (Git/Perforce), EDA tool and IC flow knowledge, scripting and automation expertise.
Python, Git, Perforce, Linux, SKILL, Tcl, shell, Cadence, LSF, EDA, PDKs
2mo
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Field Application Engineer, Software Sales
Austin, Texas, United States
$160k-$225k/yr HybridFull Time
Renesas Electronics
Renesas ElectronicsTokyo Stock Exchange: 6723: Designs and manufactures semiconductors for automotive and industrial systems.
5+ YOE5+ years in EDA/PCB design or CAD/CAE; strong Altium knowledge; excellent communication; pre/post-sales experience; bachelor’s in Electrical or Computer Engineering; advanced degree a plus.
Altium Designer, Altium 365, EDA tools, CAD/CAE
3w
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Senior Staff ASIC CAD Flow Infrastructure Engineer
Austin, Texas, United States
$129k-$191k/yr OnsiteFull Time
Marvell
MarvellNASDAQ: MRVL: Designs and develops high-performance semiconductor and infrastructure solutions.
5+ YOE5+ years ASIC CAD/EDA or infrastructure engineering experience, proficiency in Python, Tcl, Shell, Linux, experience supporting Synopsys/Cadence/Siemens EDA tools, strong ASIC/SoC design-flow knowledge, bachelor’s degree in CS/EE (advanced degree or equivalent experience acceptable).
Python, Tcl, Shell, Linux, Synopsys, Cadence, Siemens EDA, EDA
2mo
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Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering)
Irvine or Austin or Sunnyvale
$160k-$220k/yr OnsiteFull Time
SpaceX
SpaceX: Designs and launches advanced rockets and satellite internet constellations.
5+ YOEBachelor’s degree in electrical engineering, computer engineering or computer science; 5+ years ASIC/physical design experience; strong EDA tool knowledge; scripting skills; ability to work extended hours.
EDA tools, Python, Csh/Bash/Shell, Perl, TCL, Makefile
1mo
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PD Engineer, Annapurna Labs
Austin, Texas, United States
$136k-$184k/yr OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
Bachelor's in EE or related, expertise with EDA tools (Cadence, Mentor Graphics, Synopsys), deep understanding of physical sign-off activities, and experience driving RTL-to-GDS flows and physical implementation.
Cadence, Mentor Graphics, Synopsys, EDA, RTL, RTL2GDS, GDS
3mo
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Senior IP Design Engineer
Austin or San Diego
$129k-$204k/yr OnsiteFull Time
MediaTek
MediaTekTaiwan Stock Exchange: 2454: Designs and develops system-on-chip solutions for electronic devices.
5+ YOE5+ years RTL design experience, proficiency in SystemVerilog and architectural modeling, knowledge of digital design and sign-off checks (LINT, CDC, CLP), familiarity with SDC/UPF and EDA flows.
SystemVerilog, RTL, LINT, CDC, CLP, SDC, UPF, EDA, Claude
3mo
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ASIC RTL Design Engineer (784246)
Austin, Texas, United States
HybridFull Time
Ericsson
EricssonNasdaq: ERIC: Manufactures telecommunications equipment and provides networking services.
3+ YOEBS in Electrical or Computer Engineering; several years of hands-on RTL design experience; strong digital logic; proficient in C/C++, TCL, Python; SystemVerilog/Verilog/VHDL; CDC/STA knowledge; RTL linting/CDC tools; AMBA experience; EDA tool familiarity; Git/Linux.
SystemVerilog, Verilog, VHDL, C, C++, Python, TCL, EDA tools, SpyGlass, AMBA, Cadence, Mentor, Synopsys, Git, Linux
1mo
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Principal Engineer, Design Verification Engineering
Austin, Texas, United States
$198k-$251k/yr HybridFull Time
Analog Devices
Analog DevicesNASDAQ: ADI: Designs and manufactures semiconductors for signal processing and power management.
10+ YOEMaster's in EE/CE (or equivalent) and 10+ years verification experience; expertise in System Verilog, UVM/OVM, Verilog, C/C++, Perforce or Git, EDA tools, scripting (Python/Perl/Shell), and pre/post-silicon verification including ARM or RISC-V subsystems.
System Verilog, UVM, OVM, Verilog, C, C++, Perforce, Git, EDA tools, Python, Perl, Shell
2w
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Senior RTL Design Engineer – DDR/LPDDR Memory Controller
Austin or Boxborough or Vancouver
HybridFull Time
AMD
AMDNASDAQ: AMD: Designs and manufactures computer processors and graphics technology.
Experience in digital design, Verilog/SystemVerilog, scripting (Python/Perl/Tcl), EDA tool flows, and DDR/LPDDR memory systems; bachelor’s or master’s in related field and strong communication and problem-solving skills.
Verilog, SystemVerilog, Python, Perl, Tcl, EDA tools
1mo
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ASIC DFT Engineer
San Jose or Austin
$165k-$241k/yr HybridFull Time
Cisco
CiscoNASDAQ: CSCO: Develops and sells networking hardware and cybersecurity software.
7+ YOEBachelor's or Master's in Electrical/Computer Engineering with 7+ years experience in DFT, ATPG, Jtag/scan/BIST, EDA tools (TestMax/Tetramax/Tessent/PrimeTime), gate-level simulation, and post-silicon validation.
Jtag, BIST, ATPG, TestMax, Tetramax, Tessent, PrimeTime, VCS, P1687, System Verilog, Verilog
1mo
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Application Engineer
San Jose or Austin or Cary or Columbia or Burlington
$74k-$138k/yr OnsiteFull Time
Cadence
CadenceNASDAQ: CDNS: Develops software and hardware for designing electronic systems.
0+ YOEBachelor's degree in STEM required; entry-level new grad role with experience using EDA tools; familiarity with UNIX, C/C++, Perl, TCL, Python; fundamentals in design, verification, HDLs, synthesis, and timing.
Electronic design automation (EDA) tools, HDLs, UNIX, C/C++, Perl, TCL, Python
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Application Engineer
San Jose or Cary or Austin or Burlington or Columbia
$74k-$138k/yr OnsiteFull Time
Cadence
CadenceNASDAQ: CDNS: Provides software and hardware for designing integrated circuits and systems.
Bachelor's degree in STEM required; entry-level cohort program for new graduates. Familiarity with EDA tools, fundamentals of design/verification, UNIX, C/C++, Perl, TCL, Python; strong communication and problem-solving skills.
Electronic Design Automation (EDA), UNIX, C/C++, Perl, TCL, Python, Hardware Description Languages (HDLs)
1mo
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Lead CAD & Design Enablement Engineer
Austin, Texas, United States
OnsiteFull Time
Olix
Olix: Developing optical hardware for artificial intelligence inference.
5+ YOE5+ years supporting semiconductor design teams in CAD/EDA or silicon infrastructure roles; hands-on with Cadence, Synopsys, Siemens EDA (Mentor), or Ansys; scripting in Python, Tcl, Shell, or Perl; Linux/Unix and compute infrastructure experience.
Cadence, Synopsys, Siemens EDA (Mentor), Ansys, Python, Tcl, Shell, Perl, Linux/Unix