14 engineer digital design engineering jobs at 5 companies in Davis, CA
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Senior Staff Digital Design Power Engineer
Folsom, California, United States
$170k-$246k/yr OnsiteFull Time
6+ YOEMaster's degree in electrical engineering, computer engineering, computer science, or related field, plus six years of related experience and expertise in VLSI development, RTL design, synthesis, and physical design.
VLSI, RTL
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MTS, AI Optimized Memory Digital Design Engineer
Folsom or Richardson
$175k-$309k/yr OnsiteFull Time
Bachelor's in CS/CE/EE, strong digital design and microarchitecture experience, SystemVerilog proficiency, synthesis and PPA optimization experience, and programming in C/C++/Python.
SystemVerilog, C, C++, Python, Agentic AI
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Member of Technical Staff, AI‑Optimized Memory Digital Design Engineer / Microarchitect
Folsom or Richardson
$177k-$309k/yr OnsiteFull Time
5+ YOESenior digital/microarchitecture engineer with 5+ years delivering silicon-demonstrated memory/SoC designs; SystemVerilog RTL design, synthesis and PPA optimization; experience with C/C++ or Python; strong memory system architecture knowledge.
SystemVerilog, C/C++, Python
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MTS, AI Optimized Memory Digital Design Engineer
Folsom or Richardson
$175k-$309k/yr OnsiteFull Time
Bachelor's in CS/CE/EE, strong digital design and microarchitecture experience, SystemVerilog and programming (C/C++/Python) proficiency, synthesis and PPA experience, and experience delivering silicon-proven designs.
SystemVerilog, C, C++, Python, Agentic AI
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Digital Engineer/Principal Digital Engineer
McClellan Park, California, United States
$101k-$188k/yr OnsiteFull Time
2+ YOERequires a STEM bachelor's degree and 2–5 years of related experience depending on level, or an advanced degree; U.S. citizenship; Secret clearance eligibility; FPGA design with VHDL or Verilog; and Vivado and QuestaSim experience.
FPGA, VHDL, Verilog, Electronic Design Automation (EDA) Tools, Vivado, QuestaSim, AMD/Xilinx 7, Zynq, Kintex, Ultrascale, Versal, DSP, MATLAB
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Digital Engineer/Principal Digital Engineer
McClellan, California, United States
$101k-$188k/yr OnsiteFull Time
2+ YOESTEM bachelor's degree and 2 or 5 years of related experience depending on level, or qualifying master's/PhD. Requires US citizenship, Secret clearance eligibility, FPGA design with VHDL or Verilog, and EDA tools.
FPGA, VHDL, Verilog, Electronic Design Automation (EDA), Vivado, QuestaSim, AMD/Xilinx 7, Zynq, Kintex, Ultrascale, Versal, DSP, MATLAB
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Staff Engineer Digital
McClellan Park, California, United States
$198k-$292k/yr OnsiteFull Time
12+ YOERequires a STEM bachelor's degree with 12 years, master's with 10 years, or PhD with 8 years of related experience; FPGA design with VHDL or Verilog; U.S. citizenship; and ability to obtain Secret clearance.
VHDL, Verilog, AMD/Xilinx 7, Zynq, Kintex, Ultrascale, Versal, Electronic Design Automation (EDA) Tools, Vivado, QuestaSim, MATLAB, FPGA, DSP, Software-Defined Radios (SDRs), Ultra-Wideband (UWB)
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Staff Engineer Digital
McClellan, California, United States
$198k-$292k/yr OnsiteFull Time
12+ YOEBachelor's with 12 years, master's with 10 years, or PhD with 8 years in STEM; FPGA design with VHDL or Verilog; AMD/Xilinx devices; Vivado, QuestaSim, test benches, and Secret clearance eligibility.
FPGA, VHDL, Verilog, AMD/Xilinx 7, Zynq, Kintex, Ultrascale, Versal, Electronic Design Automation (EDA) Tools, Vivado, QuestaSim, MATLAB, DSP, Software-Defined Radios (SDRs), Ultra-Wideband (UWB)
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Sr Principal Engineer Digital
McClellan, California, United States
$156k-$235k/yr OnsiteFull Time
8+ YOEBachelor's degree in STEM with 8 years of related experience, master's with 6 years, or PhD with 4 years. Requires US citizenship, Secret clearance eligibility, FPGA design with VHDL or Verilog, and EDA tools.
VHDL, Verilog, AMD/Xilinx 7, Zynq, Kintex, Ultrascale, Versal, Electronic Design Automation (EDA) Tools, Vivado, QuestaSim, MATLAB, FPGA, Software-Defined Radios (SDRs)
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Sr Principal Engineer Digital
McClellan Park, California, United States
$156k-$235k/yr OnsiteFull Time
Bachelor's in STEM plus 8 years, master's plus 6 years, or PhD plus 4 years; FPGA design with VHDL or Verilog; AMD/Xilinx devices, Vivado, QuestaSim, test equipment, and test benches; U.S. citizenship required.
FPGA, VHDL, Verilog, AMD/Xilinx 7, Zynq, Kintex, Ultrascale, Versal, Electronic Design Automation (EDA) Tools, Vivado, QuestaSim, MATLAB, DSP, Software-Defined Radios (SDRs), Ultra-Wideband (UWB), test benches
3mo
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SMTS Analog Design Engineer, Mixed-Signal PHY (Clocking & High-Speed I/O)
Boise or Folsom or Richardson or San Jose
$159k-$347k/yr OnsiteFull Time
10+ YOEBS/MS/PhD in EE; 10+ years analog/mixed-signal IC design with tape-out; deep clocking (PLL/DLL/CDR) expertise; transistor-level simulation with HSpice; strong jitter analysis and analog-digital interface experience.
HSpice, Verilog-AMS, Real-number modeling (RNM)
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Electronics Engineer II
Rancho Cordova, California, United States
$80k-$85k/yr OnsiteFull Time
5+ YOEBachelor's degree in electronic engineering with 5+ years of engineering experience, or associate degree with 9+ years. Requires PCB design, electronic testing, troubleshooting, analog/digital/embedded design, and communication skills.
PCAD, Altium, AutoCAD, VHDL, PCB, oscilloscope, DVM, Logic analyzers
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Member of Technical Staff, AI‑Optimized Memory Digital Design Engineer / Microarchitect
Folsom or Richardson
$177k-$309k/yr OnsiteFull Time
5+ YOE5+ years of digital design and memory systems experience; strong microarchitecture knowledge; proficiency in SystemVerilog, C/C++, Python; ability to drive data-driven architectural decisions.
SystemVerilog, C/C++, Python, Synthesis tools
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Senior Electrical Engineer
Irving or Bronx or Sacramento or Dallas
$125k-$135k/yr OnsiteFull Time
10+ YOE10+ years electrical engineering; analog/digital circuit design; up to 600VAC; PCB layout; Ethernet/CAN/RS232; elevator domain knowledge.
Altium, Embedded C, FPGA, CAN, Ethernet, RS232/422