7 engineer digital design engineering jobs at 4 companies in Elk Grove, CA
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MTS, AI Optimized Memory Digital Design Engineer
Folsom or Richardson
$175k-$309k/yrOnsiteFull Time
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
Bachelor's in CS/CE/EE, strong digital design and microarchitecture experience, SystemVerilog proficiency, synthesis and PPA optimization experience, and programming in C/C++/Python.
Northrop GrummanNYSE: NOC: Develops and manufactures advanced aerospace, defense, and space systems.
2+ YOESTEM bachelor's degree and 2 or 5 years of related experience depending on level, or qualifying master's/PhD. Requires US citizenship, Secret clearance eligibility, FPGA design with VHDL or Verilog, and EDA tools.
Northrop GrummanNYSE: NOC: Develops and manufactures advanced aerospace, defense, and space systems.
12+ YOEBachelor's with 12 years, master's with 10 years, or PhD with 8 years in STEM; FPGA design with VHDL or Verilog; AMD/Xilinx devices; Vivado, QuestaSim, test benches, and Secret clearance eligibility.
Northrop GrummanNYSE: NOC: Develops and manufactures advanced aerospace, defense, and space systems.
8+ YOEBachelor's degree in STEM with 8 years of related experience, master's with 6 years, or PhD with 4 years. Requires US citizenship, Secret clearance eligibility, FPGA design with VHDL or Verilog, and EDA tools.
NidecTokyo Stock Exchange: 6594: Manufactures electric motors and electronic components for industrial applications.
5+ YOEBachelor's degree in electronic engineering with 5+ years of engineering experience, or associate degree with 9+ years. Requires PCB design, electronic testing, troubleshooting, analog/digital/embedded design, and communication skills.
Member of Technical Staff, AI‑Optimized Memory Digital Design Engineer / Microarchitect
Folsom or Richardson
$177k-$309k/yrOnsiteFull Time
Micron TechnologyNASDAQ: MU: Designs and manufactures semiconductor memory and data storage solutions.
5+ YOE5+ years of digital design and memory systems experience; strong microarchitecture knowledge; proficiency in SystemVerilog, C/C++, Python; ability to drive data-driven architectural decisions.