57 firmware verification engineer jobs at 36 companies in United States
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Senior Firmware Verification Engineer
Austin, Texas, United States
OnsiteFull Time
5+ YOEBS/MS in EE or Computer Engineering required; 5+ years firmware verification experience in pre-silicon; SystemVerilog, C, Python/Perl skills; familiarity with RTL, emulation, and lab test equipment.
SystemVerilog, UVM, C, Python, Perl, RTL, FPGA, QEMU, SimVision, Verdi, oscilloscopes, power supplies, logic analyzers
2mo
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Principal Firmware Verification Engineer - UVM (Onsite)
Marlborough, Massachusetts, United States
$108k-$205k/yr OnsiteFull Time
8+ YOEDegree in STEM with 8+ years experience or advanced degree with 5+ years; 4+ years UVM; SystemVerilog and VHDL; experience with FPGA/SoC/CPLD verification; familiar with AXI/ SPI/ I2C/ PCIe/ UART/ Gb Ethernet; scripting in TCL/Perl/Python; Git/SVN; cross-functional Agile.
UVM, SystemVerilog, VHDL, AXI, SPI, I2C, PCIe, UART, Gb Ethernet, TCL, Perl, Python, Git, SVN
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Senior Firmware Engineer - Development, Verification and Infrastructure
Santa Clara, California, United States
$152k-$288k/yr HybridFull Time
3+ YOEBS/MS in EE/CS or equivalent, 3+ years firmware/software verification experience, proficiency in Python/C/C++, strong debugging and analytical skills, understanding of computer architecture, collaboration and communication skills.
Python, C, C++, RISC-V, RTOS
2w
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Firmware Engineer
Redwood City, California, United States
$110k-$150k/yr OnsiteFull Time
1+ YOEB.S./M.S. in Electrical/Computer Engineering, 1+ years FPGA/firmware development, VHDL and Vivado experience, hardware lab debugging, EMBD verification and Git proficiency, strong communication and DSP knowledge.
VHDL, Xilinx Vivado, TCL, Mentor Questasim, AMD/Xilinx FPGA, Zynq UltraScale+, Series 7, Git, MATLAB, Python, C++, JIRA, Confluence, Bitbucket, oscilloscope, logic analyzer, spectrum analyzer, JTAG
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Lead Firmware Engineer
Grand Rapids, Michigan, United States
OnsiteFull Time
7+ YOEDO-254 experience, FPGA and firmware design expertise (VHDL/Verilog), 7–9+ years relevant experience, systems engineering and verification experience, bachelor's in EE/CE required, strong communication and mentoring skills.
Xilinx, Microchip FPGAs, ISE, Vivado, Libero, Active-HDL, QuestaSim, VHDL, Verilog, RTOS, MBSE
3w
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Firmware Engineer
Irvine, California, United States
$145k-$175k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE,5+ years FPGA firmware experience with VHDL/Verilog,3+ years Xilinx tool experience,SoC/PS-PL integration,FPGA DSP implementation,EMB Linux/bare-metal familiarity,strong verification and debug skills.
VHDL, Verilog, Vivado, Vitis, Vivado HLS, UVM, Git, oscilloscope, logic analyzer, spectrum analyzer
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FPGA Firmware Developer
Batavia, Illinois, United States
$100k-$131k/yr OnsiteFull Time
4+ YOEDesign and implement FPGA logic and embedded firmware; perform simulation, timing analysis, verification, hardware–firmware integration; provide technical direction. Requires engineering degree and multi-year experience.
Zynq, UltraScale, 7-Series, Vivado, Vitis, High-Level Synthesis (HLS), JTAG, Integrated Logic Analyzer (ILA)
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Firmware Engineer II
Austin, Texas, United States
OnsiteFull Time
Develop bare-metal C firmware for DDR5 PHY on microcontrollers; knowledge of DDR5 JEDEC spec and DIMM configurations; experience with high-speed SerDes/memory interface firmware, RTL simulations, scripting (Shell/Perl/Python/TCL), and verification EDA tools.
C, Verilog, RTL, Shell, Perl, Python, TCL, simulators, waveform viewers, DDR5 JEDEC
1w
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R+D Firmware Engineer III
Versailles or Blue Ash
HybridFull Time
Midmark: Designs and manufactures medical, dental and animal health equipment.
4+ YOEBachelor's degree (or equivalent) and 4+ years relevant experience; deep embedded systems and firmware expertise, C/C++ proficiency, RTOS, debugging, technical leadership, and verification practices.
Jenkins, Travis CI, Git, Python, Jave, C, C++, Bluetooth Low Energy (BLE), CAN, JTAG/SWD, oscilloscopes, logic analyzers, packet sniffers
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Tech Staff Engineer - Firmware
Roseville, California, United States
$88k-$232k/yr OnsiteFull Time
10+ YOEBS/MS in CS/CE or equivalent, 10+ years embedded systems development and verification, strong C/C++/Python, experience with PCIe/NVMe, secure boot/security firmware, leadership and documentation skills.
C, C++, Python, Rust, ARM Architecture, NVMe, PCIe, Caliptra Open-Source Root-of-Trust, Cadence Palladium, Cadence Protium, Bus/Logic Analyzers, PCIe Exercisers, Git, Perforce, JIRA, Linux, Perl, Agile Scrum, DevOps, Secure Development Life Cycle
3mo
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Lead CPU Firmware Verification and Validation Engineer/ Manager
Santa Clara, California, United States
$212k-$318k/yr OnsiteFull Time
6+ YOEBachelor's degree plus 8+ years (or Master's+7/PhD+6) in engineering or related field; 4+ years with C/C++/Java/Python; experience with Git/Perforce, databases, APIs; leadership and quality/process expertise.
C, C++, Java, Python, Git, Perforce, Database Management Software, API, CI/CD, Design For Test (DFT)
1w
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Design Verification Engineer
Santa Clara, California, United States
HybridFull Time
Experience in ASIC/SoC design verification, developing directed and random tests, debugging RTL, collaborating with RTL/firmware teams; familiarity with Verilog/SystemVerilog, UVM, C/C++ and scripting languages preferred.
Verilog, System Verilog, UVM, C, C++, Python, Perl, TCL
3mo
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Sr. Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
6+ YOE6+ years in IP or SoC verification; strong SystemVerilog/UVM experience; Python proficiency; exposure to microcode/firmware; excellent debugging and communication skills.
UVM, SystemVerilog, Python, constrained-random verification, AI-assisted tools
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Senior ASIC Verification Engineer
Austin or Santa Clara
$136k-$265k/yr HybridFull Time
5+ YOEBachelors/Masters in CS/CE/EE (or equivalent experience), 5+ years experience, SystemVerilog OOP, verification methodology (UVM), VCS/Debussy/GDB exposure, experience with random stimulus, functional coverage, assertions, firmware/hardware verification.
SystemVerilog, VCS, Debussy, GDB, UVM, C, RISC-V Assembly
3w
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PHY Design Verification Engineer
United States
OnsiteFull Time
Experience in wireless SoC development including PHY/ MAC, RF/analog, VLSI/RTL, design verification, emulation, test and validation, and firmware/software collaboration.
2mo
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Design Verification Engineer, Principal
Santa Clara, California, United States
$159k-$238k/yr OnsiteFull Time
5+ YOEBS in CE/EE/CS with 10+ years (or MS/PhD with 5+ years) verification and firmware/software experience; expertise in System Verilog, UVM, random verification, Python/Perl, EDA tools, OOD, Linux, C++ and ARM assembly; leadership and tape-out experience.
System Verilog, UVM, Python, Perl, EDA Verification tools, Linux, C++, ARM assembly
3mo
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Sr. Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
6+ YOE6+ years IP/SoC verification experience; hands-on UVM, SystemVerilog, Python; BS/MS in EE or CE (or equivalent experience); exposure to microcode/firmware; strong analytical and communication skills.
UVM, SystemVerilog, Python
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Sr. Design Verification Engineer
San Jose, California, United States
$130k-$160k/yr OnsiteFull Time
7+ YOEBS/MS in EE/CE, 7+ years RTL/functional verification using SV/UVM, PCIe and gate-level experience, firmware-based simulation and C knowledge, strong debugging and scripting (Python/Perl/Shell) skills.
SV, UVM, C, Python, Perl, Shell scripting, PILOT
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Sr. Staff Firmware Engineer (Embedded OTA & Uptane Security Platform)
Sunnyvale or San Francisco
$189k-$267k/yr OnsiteFull Time
Design and implement embedded OTA/Uptane client frameworks with cryptographic verification; develop safety-critical firmware in C for bare-metal/RTOS and Python host tooling; optimize storage (eMMC, UFS, QSPI) and A/B dual-bank update systems.
Uptane, eMMC, UFS, QSPI, C, Python, RTOS, bootloader
1mo
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Firmware Architect
San Jose or United States
$150k-$300k/yr HybridFull Time
12+ YOEBS/MS in ECE/CS, 12+ years embedded firmware experience with 5+ years bring-up of high-speed interface IP; expert C and assembly, JTAG/OpenOCD debugging, PCIe/CXL/UEFI/secure-boot experience, HW/SW co-verification knowledge.
C, Assembly, JTAG, OpenOCD, Teradyne UltraFLEX, Advantest T2000, UEFI, BIOS, ACPI, SMBus, I2C, MCTP, VT-d, IOMMU, PCIe, CXL, UCIe, SPDM (DSP0274), PLDM (DSP0267), VFIO-mdev
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