4 formal verification engineer jobs at 4 companies in Boston, MA
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Formal Verification Engineer
Austin or Boston or Santa Clara
$127k-$217k/yr HybridFull Time
8+ YOERequires 8+ years in design verification focused on formal verification, VC Formal or JasperGold, SystemVerilog Assertions, TCL/Python/Perl, and a bachelor's or master's degree in computer or electrical engineering.
VC Formal, JasperGold, SystemVerilog Assertions (SVA), TCL, Python, Perl
2mo
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Senior Formal Verification Engineer
Santa Clara or Austin or Westford or Hillsboro
$168k-$311k/yr HybridFull Time
7+ YOE7+ years experience with formal verification, strong knowledge of Verilog/System Verilog, temporal logic assertions, abstraction techniques, scripting in TCL/Perl/Python, and solid understanding of CPU/GPU architectures.
Verilog, System Verilog, temporal logic assertions, TCL, Perl, Python, Jasper Gold, VC Formal, RTL
1mo
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Design Verification Engineer – Physical AI Compute
Santa Clara or Austin or Boston
$75k-$275k/yr OnsiteFull Time
Experience verifying complex digital/SoC systems with SystemVerilog/UVM, C/C++, assertions, formal, emulation and debugging across HW/SW boundaries.
SystemVerilog, UVM, C, C++, formal verification, emulation, FPGA
3mo
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Product Line Integrated Verification & Validation Lead Engineer
Nashua or Totowa or New Hampshire or New Jersey or United States
$153k-$261k/yr OnsiteFull Time
10+ YOE5+ MgmtBachelor's in a technical field required; 10+ years systems testing/IV&V experience and 5+ years leadership; experience with EW/RADAR/missile systems, test strategy, formal qualification testing, requirements testability, and government contracting; active Secret clearance and ability to obtain Top Secret/SCI.
MBSE