12 formal verification engineer jobs at 11 companies in Vallejo, CA
1w
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Formal Verification Engineer
Palo Alto or London
OnsiteFull Time
Bachelor's degree or equivalent experience; verification or theorem-proving experience; formal methods and mathematical logic expertise; proof-assistant proficiency; autonomous risk management and strong customer communication.
Lean 4, Coq, Isabelle, Agda
3mo
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Formal Verification - AI/ML Engineer
Austin or San Francisco
HybridFull Time
10+ YOEBachelor's degree with 10+ years of industry experience; strong Python/ML, LLMs, RAG, and FV domain knowledge.
Python, PyTorch, LangChain, LlamaIndex, HuggingFace, Inference engines, Model serving
2w
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Digital Verification Engineer
South San Francisco, California, United States
$131k-$243k/yr OnsiteFull Time
3+ YOEMinimum 3 years digital ASIC verification experience; strong SystemVerilog; automation scripting (Python, Perl, Makefile, Tcl, UNIX shell); code coverage and regression setup; familiarity with SystemC/C++, UVM, formal and low-power verification preferred.
SystemVerilog, Python, Perl, Makefile, Tcl, UNIX shell, SystemC, C++, IEEE-1801 (UPF), UVM, ARM, RISC-V, AMBA, FPGA
1mo
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Digital Verification Engineer - Weapon Subsystems 2
Albuquerque or Livermore or United States
$122k-$238k/yr HybridFull Time, Temporary
Bachelor's in relevant discipline (or equivalent experience), ability to obtain DOE Q-level clearance, expertise in formal verification, VHDL/Verilog/SVA proficiency, strong analytical and written communication skills.
VHDL, Verilog, SystemVerilog Assertions (SVA)
2mo
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Digital Verification Engineer - Weapon Subsystems 2
Livermore or California or New Mexico or United States
$122k-$238k/yr HybridFull Time, Temporary
Bachelor's degree or equivalent, ability to obtain DOE Q-level (Top Secret) clearance, several years applying formal verification to FPGA/ASIC, proficiency with VHDL, Verilog, and SystemVerilog Assertions (SVA), strong analytical and written communication skills.
VHDL, Verilog, SystemVerilog Assertions (SVA)
3mo
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Member of Technical Staff, Hardware, Design Verification Engineer
Palo Alto or Austin
$200k-$420k/yr OnsiteFull Time
5+ YOE5+ years industry experience, BS in EE/CE/CS, deep SystemVerilog and UVM experience, verification methodology expertise, familiarity with emulation/prototyping and formal methods, strong collaboration and debugging skills.
SystemVerilog, UVM, ZeBu, HAPS, Palladium, Protium, Python, Perl, Bash, TCL, SVA, Jasper, VC Formal, AXI, CHI
1w
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Member of Technical Staff - Formal Verification
Palo Alto, California, United States
OnsiteFull Time
PhD in computer science, EECS, or related field preferred; deep expertise in two formal methods areas; formal tool experience; shipped artifact experience; strong software engineering and compiler infrastructure skills.
TLA+, Lean, Coq, SMT solvers, model checkers, proof assistants, High-Level Synthesis (HLS)
1mo
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RTL Design Engineer
New York City or Palo Alto or London
$205k-$285k/yr HybridFull Time
Production SystemVerilog RTL experience, verification with UVM/cocotb/formal, taped-out silicon, ASIC/SoC design background, simulation and timing collaboration experience.
SystemVerilog, UVM, cocotb, formal, Chipyard, OpenTitan, CVA6, RISC-V
1mo
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Research Engineer, Chip Design RL (Reinforcement Learning)
San Francisco or New York City
$500k-$850k/yr HybridFull Time
Bachelor's or equivalent, expertise in ASIC/FPGA design and EDA tools, experience with RTL, verification (UVM, formal methods), physical design and tapeout experience; RL experience and tooling experience preferred.
EDA tools, UVM, formal methods, place-and-route
2mo
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Forward Deployed Engineer (FDE)
San Francisco or London or Budapest
OnsiteFull Time
Experience in high-accountability engineering cultures; familiarity with Rust, Java/Kotlin, or Go; domain expertise in formal methods/verification and specification-aware programming; experience with proof assistants and verification tools; strong communication with senior engineers/CTOs.
Rust, Java, Kotlin, Go, Verus, Dafny, Viper, TLA+, Lean, Roq, Isabelle
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Senior Staff Security Engineer
Berkeley, California, United States
$170k-$223k/yr OnsiteFull Time
10+ YOE10+ years cyber security experience; systems programming in C/C++/Rust; applied cryptography; hardware root-of-trust, secure boot, HSM/HSE/TPM integration; formal verification and threat modeling.
C, C++, Rust, Go, HSM, HSE, TPM, Delay-Disruption Tolerant Networking (DTN), Bundle Protocol, NERC CIP, NIST IR 7628, NIST SP 800-160
3mo
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Cogent AI Fellowship (Member of Technical Staff)
San Francisco, California, United States
$100k-$300k/yr OnsiteFull Time
PhD in Computer Science or related field; strong publication record or open-source contributions; research in formal methods, program analysis, PL, or runtime verification; strong engineering ability and production-minded prototype development; independent, self-starting mindset; able to work in ambiguity.