2mo
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FPGA Engineer
Exton, Pennsylvania, United States
OnsiteFull Time
2+ YOEBachelor's in Electrical Engineering; 2+ years FPGA/ASIC in regulated environments; proficient in Verilog/VHDL; Xilinx Vivado; DO-254 familiarity; hardware debugging; cross-functional collaboration
Verilog, VHDL, Xilinx Vivado, RTL simulation, ModelSim/Questa, DO-254 knowledge, I2C, SPI, JTAG, Ethernet, PCIe
3mo
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FPGA Engineer (NJ, Moorestown)
Moorestown, New Jersey, United States
OnsiteFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Familiar with RTL, C/C++, Python, VHDL/Verilog, hardware security, FPGA design, and hardware-software integration; eligible for U.S. government security clearance; willingness to travel ~10%.
VHDL, Verilog, Vivado, GHDL, Questa, Quartus Prime, Zynq, Versal, Stratix, Agilex, AXI, ACE, Avalon, IP core, cocotb, pyuvm, Python, C, C++, Tcl
2mo
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ASIC/FPGA Verification Engineer III
Denver or Highlands Ranch or King of Prussia or Sunnyvale
$101k-$178k/yr OnsiteFull Time
3+ YOEB.S. in Electrical Engineering or equivalent, 3+ years professional ASIC/FPGA verification experience, SystemVerilog and UVM/OVM/VMM proficiency, HDL and scripting experience, ability to obtain/maintain DoD Secret clearance (US citizenship required).
SystemVerilog, Universal Verification Methodology (UVM), OVM, VMM, VHDL, Verilog, Linux, Perl, TCL, Python
2mo
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ASIC/FPGA Verification Engineer III
Denver or Highlands Ranch or King of Prussia or Sunnyvale
$101k-$201k/yr OnsiteFull Time
3+ YOEB.S. in Electrical Engineering (or equivalent), 3+ years ASIC/FPGA verification experience using UVM/OVM/VMM, HDL (VHDL/Verilog/SystemVerilog), ability to obtain DoD Secret clearance (US citizenship required); scripting (Perl/TCL/Python) and leadership experience preferred.
SystemVerilog, Universal Verification Methodology (UVM), OVM, VMM, VHDL, Verilog, Perl, TCL, Python, Linux
2mo
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ASIC/FPGA Design Engineer IV, TS/SCI Clearance
Boulder or King of Prussia or Littleton or Louisville or Sunnyvale
$124k-$246k/yr OnsiteFull Time
5+ YOEMust be US citizen with active Top Secret clearance, BS in Electrical Engineering or equivalent, 5+ years experience in ASIC/FPGA design/debug/verification, leadership and project management skills, and familiarity with project tools.
Microsoft Project, Microsoft Office, Atlassian JIRA, Earned Value Management System (EVMS)
8h
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Sr. FPGA Developer (Hybrid- Aberdeen Proving Ground, Maryland)
Aberdeen Proving Ground or Middletown
$150k-$175k/yr HybridFull Time
10+ YOEBachelor's in EE/CE,10+ years FPGA design experience with Xilinx Vivado, Verilog/VHDL, RFSoC/Versal platforms, RTL-to-hardware validation, AXI interfaces, and eligibility for DoD Secret clearance.
Xilinx Vivado, Verilog, VHDL, Siemens Questa, Vivado Simulator, Xilinx Zynq UltraScale+ RFSoC, Zynq UltraScale+ MPSoC, Versal, Versal ACAP, ADRV9009, AD9081, ADRV9009-ZU11EG, AXI-Lite, AXI-Stream, JESD204B, JESD204C, JTAG, Integrated Logic Analyzer (ILA), VIO, Ethernet, PCIe, Tcl, Python
1mo
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FPGA/Firmware Engineers in NY, NJ & PA
Liverpool or Owego or Syracuse or Moorestown or King of Prussia
$101k-$201k/yr OnsiteFull Time
5+ YOEBachelor's in STEM, 5+ years engineering experience, FPGA/ASIC/firmware experience, U.S. citizenship and ability to obtain/maintain Secret clearance, experience with VHDL/Verilog, C/C++, Python, FPGA tools and PCB tools.
C, C++, Assembly, Python, Perl, VHDL, Verilog, Altium, Cadence, Eagle, Vitis HLS, Vivado, Quartus, Git, SVN, PCIe, AXI, SPI
1mo
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Sr. FPGA Developer (Hybrid- Aberdeen Proving Ground, Maryland)
Aberdeen Proving Ground or Middletown
$150k-$175k/yr HybridFull Time
10+ YOEBachelor's in EE/CE, 10+ years FPGA design experience, strong Verilog/VHDL and Xilinx Vivado skills, RFSoC/Versal experience, RTL simulation and hardware debug experience, U.S. citizenship and Secret clearance (or ability to obtain).
Xilinx Vivado, Verilog, VHDL, Siemens Questa, Vivado Simulator, Integrated Logic Analyzer (ILA), VIO, JTAG, ADRV9009, AD9081, JESD204B/C, Ethernet, PCIe, Aurora, AXI-Lite, AXI-Stream, DMA, Tcl, Python
1mo
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SATCOM Systems Engineer (Hybrid- Aberdeen, Maryland)
Aberdeen Proving Ground or Wilmington or Middletown or United States
$135k-$165k/yr HybridFull Time
7+ YOEBachelor's in engineering, 7+ years DoD SATCOM systems experience, technical lead experience, proficiency producing systems engineering docs, hands-on experience with iDirect/Comtech/ViaSat modems, MIL-STD-188-164B/165B knowledge, basic Python and FPGA/DSP understanding, U.S. citizenship and active DoD Secret clearance.
MIL-STD-188-164B, MIL-STD-188-165B, iDirect, Comtech, ViaSat, Python, FPGA, DSP, spectrum analyzers, signal generators
3w
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Principal Firmware Engineer
Horsham, Pennsylvania, United States
$97k-$189k/yr HybridFull Time
8+ YOEBachelor's in EE or CS, 8+ years embedded/real-time firmware experience with microcontrollers and FPGA, expert C++ and object-oriented design, EM/CI-CD/DevOps experience, lab debugging skills, strong communication.
NIOS, ARM, GNU, C++, assembly, oscilloscope, logic analyzer, CI/CD, DevOps
5d
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Electrical Engineer - Unmanned Systems
Aberdeen Proving Ground, Maryland, United States
$90k-$190k/yr OnsiteFull Time
TS/SCI clearance, BS in Electrical/Computer or related engineering, strong circuit troubleshooting, embedded Linux and firmware experience, Python/C/C++/Rust programming, UART/SPI/I2C/CAN knowledge, RF/SDR familiarity.
Python, C/C++, Rust, KiCAD, Docker, Ghidra, Binary Ninja, USRP, HackRF, Altium, PX4, ArduPilot, Betaflight, MAVLink, UART, SPI, I²C, CAN, Linux, U-Boot, FPGAs
2mo
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Digital Signal Processing Electrical & Computer Engineer
McLean or Belcamp or Laurel
$87k-$198k/yr HybridFull Time
DSP, RF, Linux, C/C++/Rust, SDR tools (GNU Radio, Ettus UHD), MATLAB/LabVIEW, FPGA basics (VHDL/Verilog), travel up to 25%, Secret clearance, BS in Electrical or Computer Engineering.
Linux, C, C++, Rust, Software Defined Radio (SDR), GNU Radio, Ettus UHD, MATLAB, LabVIEW, VHDL, Verilog, Git
1mo
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Advanced Embedded Engineer
Lansdale, Pennsylvania, United States
OnsiteFull Time
Experience with VHDL or Verilog, C/C++, serial protocols (UART, SPI, I²C, CAN), embedded debugging, RTOS, and ability to obtain security clearance; bachelor’s degree in EE/CE preferred.
VHDL, Verilog, C, C++, UART, SPI, I²C, CAN, FPGA, oscilloscope, logic analyzer, Real-time operating systems (RTOS)
1mo
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Cybersecurity Anti-Tamper Senior Engineer
Moorestown, New Jersey, United States
$91k-$172k/yr OnsiteFull Time
5+ YOEB.S. in Electrical/Computer/Systems Engineering, 5+ years related experience (or 3 with MS), ability to obtain DoD Secret clearance, experience with OS and programming languages, secure system/product design, integration/test, and strong communication skills.
C++, Linux, FPGA
4d
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Senior Specialist, Systems Engineering 1 (41936)
Bristol, Pennsylvania, United States
OnsiteFull Time
6+ YOEBachelor's +6 years (or Master's +4, or 10 years equivalent); ability to obtain Secret clearance; experience with digital electronics, FPGA/VHDL, requirements management, system integration, and technical leadership.
FPGA, VHDL, DOORS, JAMA, CPU, GPU
2mo
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Digital Signal Processing Electrical & Computer Engineer
McLean or Laurel or Belcamp or Washington
$87k-$198k/yr RemoteFull Time
Bachelor's in Electrical or Computer Engineering; DSP, wireless, SDR, Linux/C/C++, GNU Radio, Ettus UHD, RF theory, embedded software; willing to travel up to 25%; ability to obtain Secret clearance.
Linux, C, C++, Rust, GNU Radio, Ettus UHD, SDR, Signal Processing, MATLAB, LabVIEW, Git, FPGA, VHDL, Verilog, Radio Equipment, Spectrum Analyzers, Signal Generators
2mo
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Engineering Planner (Project Engineer)
Highlands Ranch or King of Prussia or Sunnyvale
$70k-$140k/yr OnsiteFull Time
US citizen able to obtain DoD Secret clearance. Experience or coursework in FPGA/ASIC design and HDL (VHDL, Verilog, SystemVerilog). Proficiency with Microsoft Project and JIRA. BS in EE preferred.
Microsoft Project, JIRA, VHDL, Verilog, SystemVerilog
2mo
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Principal Engineer – Network Evolution Architecture
Philadelphia, Pennsylvania, United States
HybridFull Time
10+ YOE Lead strategic architecture and system design for next-generation access and transport technologies; evaluate hardware/software architectures; design RF/optical networks; develop PoCs; collaborate with partners.
FPGA, ASIC, Python, RF, Optical networking, WiFi, O-RAN
1mo
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Embedded Development Tech Lead
Aberdeen, Maryland, United States
$113k-$257k/yr OnsiteFull Time
8+ YOE8+ years software/systems design experience, 3+ years with Software Defined Radio (SDR), proficiency in C/C++, Git, Linux (RedHat or Rocky), embedded hardware experience, Secret clearance, and a bachelor’s degree.
C, C++, Git, Software Defined Radio (SDR), Linux, RedHat, Rocky Linux, Atlassian Jira, Confluence, Xilinx SoC, RFSoC, FPGA, AI Code Generation, Agile SCRUM
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