202 fpga engineer jobs at 63 companies in Hawthorne, CA
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FPGA Engineer
Torrance, California, United States
$120k-$170k/yr HybridFull Time
2+ YOEBachelor's degree in Electrical Engineering or equivalent, 2–4+ years' experience, Verilog and SystemVerilog expertise, Python, FPGA DSP or networking, FPGA SoCs, and lab debugging experience.
Verilog, SystemVerilog, Python, FPGA SoCs, oscilloscopes, spectrum analyzers, HLS, C++, Rust, FPGAs
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FPGA Engineer II
Long Beach, California, United States
$102k-$141k/yr OnsiteFull Time
2+ YOEBachelor's degree in engineering, 2+ years of FPGA firmware development, VHDL proficiency, FPGA design knowledge, and U.S. citizenship or required authorization.
VHDL, Xilinx, Microchip, UVM, VUnit, SPI, UART, I2C, CAN, GigE, PCIe, GIT, JIRA
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FPGA Engineer II
Long Beach, California, United States
$102k-$141k/yr OnsiteFull Time
2+ YOEBachelor’s degree in engineering, 2+ years of FPGA firmware development, VHDL proficiency, FPGA design fundamentals, and U.S. citizenship or required export authorization.
VHDL, Xilinx, Microchip, UVM, VUnit, SPI, UART, I2C, CAN, GigE, PCIe, GIT, JIRA, PCB
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FPGA Engineer
El Segundo or Los Angeles or Washington or San Francisco or Seattle or London
$160k-$225k/yr OnsiteFull Time
5+ YOEBachelor's in a relevant field, 5+ years FPGA RTL design experience, Verilog/SystemVerilog, AXI protocols, Vivado and SoC FPGA experience, Bash/Python scripting, U.S. Person required.
Verilog, SystemVerilog, AXI4, AXI4-Lite, AXI4-Stream, Vivado Design Suite, Zynq, Ultrascale, Ultrascale+, Versal, TCP, UDP, IP, I2C, JTAG, UART, SPI, CAN, Bash, Python, Simulink, MATLAB, C, C++, SystemC, Chisel, VHDL, git, Bitbucket CI, Jenkins
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FPGA Design Engineer
Irvine, California, United States
$100k-$140k/yr OnsiteFull Time
2+ YOEBS in EE or CS with 2+ years FPGA design; Xilinx FPGAs, SoCs, Vivado; TCL or Python; U.S. Person; background check and drug test.
Xilinx FPGAs, Vivado IDE, Tcl, Python, MATLAB, FPGA Design
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Experienced FPGA Developer
Rancho Santa Margarita, California, United States
$55/hr OnsiteContract
7+ YOEBachelor's degree in engineering,7+ years VHDL FPGA design experience, proficiency with Vivado/ModelSim and MicroSemi architecture, experience with I2C/SPI/PCIe and hardware test equipment,US citizenship required,ability to work onsite in Rancho Santa Margarita, CA.
VHDL, Verilog, SystemVerilog, Vivado, ModelSim, MicroSemi, I2C, SPI, PCIe, oscilloscope, spectrum analyzer, logic analyzer, power meter
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Senior FPGA Engineer
Long Beach, California, United States
$148k-$222k/yr OnsiteFull Time
5+ YOEBachelors in EE/Computer Eng or related; 5+ years FPGA development and high-speed digital systems experience in mission-critical applications; RTL/verification/synthesis/timing expertise; cross-functional collaboration skills.
VHDL, Verilog, SystemVerilog, SpinalHDL, Chisel, Vitis, SystemC, Simulink, RISC-V, AMD Xilinx, Intel, Microchip, CI/CD
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Staff FPGA Engineer, EW
Costa Mesa, California, United States
$220k-$292k/yr OnsiteFull Time
Design and verify FPGA/DSP modules on AMD/Xilinx SoC/FPGA platforms; experience with HDL (VHDL/Verilog), high-speed digital interfaces (PCIe, JESD, Aurora), Linux development, Git and CI/CD; eligible for U.S. Secret clearance; mentoring experience.
AMD, Xilinx, VHDL, Verilog, Linux, Git, TCL, CI/HITL, PCIE, JESD, Aurora, AMD AIE
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Principal Engineer Digital FPGA/Sr. Principal Engineer Digital FPGA (Level 3/4)
Manhattan Beach, California, United States
$125k-$235k/yr OnsiteFull Time
5+ YOERequires Top Secret clearance, STEM degree, 5+ years engineering experience (level-dependent), FPGA and electronic design/test experience, strong communication skills.
FPGA, PCB, CCA, Electronic Test System
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FPGA Design Engineer
Long Beach, California, United States
$135k-$225k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE,5+ years FPGA development with AMD/Xilinx platforms,expertise with Vivado/Vitis and HDL,experience with PCIe/Ethernet/SerDes,hardware/software integration and production bring-up.
Xilinx Vivado, Vitis, Vivado ILA, VIO, Git, Python, TCL, ModelSim, Vivado Simulator, PetaLinux
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FPGA Electrical Engineer III
Altadena, California, United States
$131k-$183k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
5+ YOEBS in Electrical/Computer Engineering, 5+ years hardware development across product lifecycle, SystemVerilog/Verilog proficiency, SoC and FPGA experience, knowledge of timing, AXI/AHB, synthesis, simulation, and avionics integration.
SystemVerilog, Verilog, Microchip Libero, Python, Linux shell scripting, Windows shell scripting, assembly language, C, C++, MATLAB, Simulink, SPICE, Altium, AXI, AHB
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Senior FPGA Engineer (TS/SCI)
Los Angeles, California, United States
$120k-$225k/yr OnsiteFull Time
3+ YOEBachelor's degree in a STEM discipline or 3+ years of software development experience, plus 3+ years designing complex FPGAs and experience with VHDL or SystemVerilog.
VHDL, SystemVerilog, Rust, C++, C, Python, Xilinx SoC, Digital Signal Processing (DSP), Ethernet, PCIe, JESD204C, AXI, AXI-Stream, TCL, Bash, Linux, RTOS
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Staff FPGA Design Engineer
Irvine, California, United States
$150k-$190k/yr OnsiteFull Time
8+ YOEBachelor's in EE/CE, 8+ years FPGA RTL architecture/development/verification, strong SystemVerilog or VHDL skills, experience with Microship Polarfire/AMD Zynq/Versal/Ultrascale, verification methodologies, Git, Python/Tcl/Bash, C/C++ on Linux, and eligibility for DoD security clearance.
SystemVerilog, VHDL, Microship Polarfire, AMD Zynq US+, Versal, AMD Ultrascale, Vivado, Mentor Modelsim/Questasim, AXI, PCIe, DDR4, DDR5, JESD204B, JESD204C, 100Gb ethernet, SPI, I2C, UART, CAN FD, LVDS, Git, Python, Tcl, Bash, Linux, C/C++
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Principal FPGA / RTL Design Engineer - Signal Processing
Los Angeles or Irvine
$175k-$225k/yr HybridFull Time
10+ YOEBS in ECE/CS or related; 10+ yrs RTL/FPGA design or 6+ yrs with PhD; Xilinx FPGAs, Vivado; fixed-point DSP; US person.
Xilinx FPGAs, Vivado IDE, Fixed-point arithmetic, Digital Signal Processing, MATLAB, Python, Perl
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FPGA Verification Engineer, Air Dominance and Strike (Fastwater Staffing)
Costa Mesa, California, United States
RemoteFull Time
2+ YOEBachelor's in EE/CE, 2+ years FPGA/ASIC verification, proficient in SystemVerilog/UVM/SVA, experience with industry simulators, Git and Linux, eligible for U.S. Secret clearance.
SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado, Git, Linux, SVUnit, Python, Tcl, Makefile, Nix
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Electrical Engineer II ASIC/FPGA Verification (Onsite)
El Segundo, California, United States
$76k-$144k/yr OnsiteFull Time
2+ YOEDegree in STEM and at least 2 years of relevant experience; active SECRET security clearance; RTL/VHDL/Verilog experience; testbench development; familiarity with ASIC/FPGA verification.
SystemVerilog, OVM/UVM, VHDL, Verilog, Questasim, Synplify, Quartus, Vivado, C++, Perl, Git, Subversion
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FPGA/ASIC Design Engineer (Silicon Engineering)
Irvine or Redmond
$125k-$145k/yr OnsiteFull Time
1+ YOEBachelor’s in EE/CE/CS/Physics; 1+ years RTL design (SystemVerilog/Verilog/VHDL); strong Python/C/C++, and PCB/lab experience.
Verilog/SystemVerilog, VHDL, Python, C/C++, Bash, HDL simulators, Spyglass, Vivado, Quartus, AXI/APB/AHB protocols
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
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Electrical Engineer II
Garden Grove, California, United States
$120k-$150k/yr OnsiteFull Time
2+ YOEBachelor's degree in electrical, electronics, or computer engineering plus 2 years' experience; requires component engineering, electronic product design, embedded systems, FPGA, schematic capture, debugging, technical writing, and U.S. citizenship.
FPGA, Altium, SiliconExpert, Z2Data, Ethernet, NTP, PTP, PTTI, BOM, MTBF, FMECA
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Senior Calibration Engineer
San Jose or Agoura Hills or Tualatin
$162k-$285k/yr OnsiteFull Time
8+ YOEBS/MS in EE/CE/CS,8+ years engineering experience,expert C++ skills,calibration and instrumentation knowledge,hardware/software debugging,work with FPGA and measurement systems.
C++, FPGA, Automated Test Equipment (ATE)
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