258 fpga engineer jobs at 74 companies in Hollister, CA
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FPGA Engineer
Sunnyvale or United States
$150k-$220k/yr RemoteFull Time
Bachelor's or master's degree in computer or electrical engineering; expertise with System Verilog, Xilinx FPGAs, Vivado, RTL verification, AXI, timing analysis, and FPGA platforms.
SystemVerilog, Xilinx, AMD, Vivado, ILA, C, C++, Xilinx Versal, Xilinx Alveo, QSFP+, GTY, GTM, AXI
1w
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Lead FPGA Engineer
Milpitas, California, United States
$118k-$200k/yr OnsiteFull Time
0+ YOEDegree in engineering or related field plus 0–5 years of related experience depending on degree; FPGA RTL, high-speed digital design, SystemVerilog, Verilog, VHDL, firmware integration, debugging, and system testing experience.
FPGA, SystemVerilog, Verilog, VHDL, Xilinx Vivado, Xilinx ISE, Synplify, Questa, ModelSim, Python, MATLAB, OrCAD, PCIe, DDR, 10G SerDes, PCB
3mo
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FPGA / VLSI Engineer
Saratoga, California, United States
$120k-$220k/yr OnsiteFull Time
Design and verify RTL/FPGA, perform FPGA prototyping, and system integration for ASIC/SoC platforms; strong SystemVerilog/Verilog; experience with UVM; VHDL is a plus.
SystemVerilog, Verilog, UVM, VHDL, FPGA, SoC
1mo
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System FPGA Engineer
Santa Clara or Austin
$152k-$228k/yr OnsiteFull Time
5+ YOEBachelor's or higher in engineering/CS and 5+ years FPGA implementation and verification experience; proficiency in Verilog/SystemVerilog, Python, cocotb, git/GitHub, vendor FPGA toolchains; strong communication skills.
Python, git, GitHub, cocotb, Verilog, SystemVerilog, AMD/Xilinx Vivado/Vitis, Intel/Altera Quartus Prime, JTAG, oscilloscope
1mo
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FPGA Engineer: Physical AI & Robotics
San Jose or Austin
HybridFull Time
Experienced FPGA/Adaptive SoC engineer with FPGA RTL and embedded software skills, familiarity with Verilog/SystemVerilog/VHDL, C/C++, Embedded Linux/Yocto, hardware debugging, and ability to work with customers on Physical AI solutions.
AMD Vivado, Vitis, Vitis HLS, Yocto, Verilog, SystemVerilog, VHDL, C, C++, PCIe, Ethernet, DisplayPort, MIPI CSI/DSI, USB, CAN, SPI, I2C, UART, GPIO, ROS 2, Git, JTAG, oscilloscope, protocol analyzer, logic analyzer
1w
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Host and Network IO FPGA Engineer
Sunnyvale or Toronto
HybridFull Time
5+ YOERequires 5+ years producing FPGA solutions, or a master's/PhD in computer or electrical engineering plus 3 years' experience; Verilog, Git, FPGA workflows, TCP/RoCE, and network debugging.
Verilog, Git, Wireshark, TCP, RoCE, Arista, Juniper
3mo
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FPGA Engineer (CA, San Jose)
San Jose, California, United States
HybridFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Experience in FPGA design and verification, proficiency in RTL/C/C++, Python; familiarity with VHDL/Verilog, hardware security, IP core development, and FPGA tools.
C, C++, Python, VHDL, Verilog, Tcl, Vivado, GHDL, Questa, Quartus Prime, Xilinx, Altera, Versal, Stratix, Avalon, AXI, ACE, IP cores, cocotb, pyuvm
3w
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Staff FPGA Engineer (Future Forward)
Sunnyvale, California, United States
$213k-$307k/yr OnsiteFull Time
8+ YOEExpertise in Verilog/SystemVerilog and FPGA design, experience with Vivado/QuestaSim/Chipscope, scripting (Python,Tcl,Perl,Shell), version control (Git,SVN), C/C++, MATLAB, and strong communication skills.
Verilog, SystemVerilog, Vivado, QuestaSim, Chipscope, Python, Tcl, Perl, Shell, Git, SVN, C, C++, MATLAB
2mo
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Senior FPGA Design Engineer
San Jose, California, United States
$150k-$200k/yr OnsiteFull Time
5+ YOEStrong RTL FPGA design experience with Vivado and Protocompiler; FPGA/IP integration; 5+ years; PCIe/USB/Ethernet; BS/MS in EE/EECS/CS; English.
Vivado, Protocompiler, IP Integration, PCIe, USB, Ethernet, SPI
3d
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ASIC & FPGA Design Engineer Stf - E4
Littleton or Sunnyvale or Denver or Boulder or Louisville or Highlands Ranch or King of Prussia
$136k-$252k/yr OnsiteFull Time
Bachelor of Science in Electrical Engineering or related field, or equivalent experience; ASIC/FPGA design, debugging, or verification experience; active Top Secret clearance and U.S. citizenship required.
ASIC, FPGA, Microsoft Project, Microsoft Office, Atlassian JIRA, Earned Value Management System (EVMS)
2mo
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Senior FPGA Prototyping Platform Engineer
Santa Clara, California, United States
$168k-$311k/yr OnsiteFull Time
7+ YOEBS in Electrical/Computer Engineering with 7+ years FPGA prototyping or MS with 5+ years; strong FPGA prototyping, lab, and debugging skills.
Synopsys Protocompiler, Xilinx Vivado, ChipScope, Oscilloscopes, Logic Analyzers, Protocol Analyzers
1mo
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FPGA Compiler (Placer) Engineer
San Jose, California, United States
$149k-$216k/yr OnsiteFull Time
6+ YOEBachelor's degree in EE/CE/CS, 6+ years in FPGA/ASIC CAD or EDA, strong algorithms and data structures, placement and physical design experience, proficiency in C/C++ and scripting (Python, Tcl).
C/C++, Quartus, Vivado, Python, Tcl
2mo
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Sr FPGA Design Engineer
Santa Clara, California, United States
OnsiteFull Time
8+ YOEBSEE or MSEE in EE/CE or related, 8+ years FPGA and embedded hardware development, strong Verilog/SystemVerilog/VHDL skills, experience with AMD/Xilinx/Intel/Altera/Lattice/Microchip platforms, PCB/PCBA and production experience, US work authorization required.
Verilog, SystemVerilog, VHDL, AMD/Xilinx, Intel/Altera, Lattice, Microchip, PCIe, Ethernet, USB, SPI, I2C, UART, CAN, DDR, DSP, Altium, Cadence Allegro, OrCAD, PCB, PCBA, DFM, DFT, EMC, EMI
2mo
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Sensing & Imaging FPGA Engineer
Cupertino, California, United States
OnsiteFull Time
Develop design solutions and early-stage hardware systems integrating cameras and non-vision sensors for consumer devices; collaborate in cross-functional engineering teams.
2mo
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Senior FPGA Prototyping Platform Engineer
Santa Clara, California, United States
$168k-$311k/yr OnsiteFull Time
5+ YOEBS (or equivalent) with 7+ years or MS with 5+ years in FPGA prototyping; expertise in synthesis, place-and-route, timing closure, lab FPGA debug, and coordination with verification and software teams.
Synopsys Protocompiler, Xilinx Vivado, ChipScope, Synopsys HAPS, oscilloscopes, logic analyzers, protocol analyzers
2mo
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FPGA Engineer Engineer (eInfochips)
San Jose or Austin
OnsiteFull Time
9+ YOE9+ years experience; proficient in Verilog/System Verilog, EDA tools (VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus), IPXACT, UPF, PCIe/AXI/APB, ARM fabric; scripting with Python/Tcl/Perl; timing signoff and clock-crossing expertise.
Verilog, System Verilog, Python, Tcl, Perl, VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus, IPXACT, UPF
1mo
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Senior FPGA Design Engineer,( Nextest, San Jose, CA)
San Jose, California, United States
$170k-$273k/yr OnsiteFull Time
8+ YOEB.S. or M.S. in Electrical Engineering, 8+ years relevant experience, RTL/Verilog, FPGA transceiver and timing experience, C/C++, EM/FPGA tool flow familiarity, lab equipment experience.
C, C++, Linux, Windows, Verilog HDL, Intel FPGA tool flows, Xilinx FPGA tool flows, UVM, ATE
1mo
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Hardware Engineer - FPGA
Milpitas or San Francisco
$152k-$222k/yr OnsiteFull Time
7+ YOEExperienced FPGA/ASIC engineer with RTL (Verilog/SystemVerilog) skills, FPGA tool experience, 7+ years (BS) or 4+ years (MS), verification experience (UVM/VMM) preferred.
Verilog, SystemVerilog, UVM, VMM
1w
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Technical Staff Engineer - Design (FPGA Fabric)
San Jose or Chandler
$91k-$232k/yr OnsiteFull Time
12+ YOEBachelor's degree and 12+ years in custom FPGA fabric or memory circuit design. Requires SPICE, EDA, scripting, Verilog, simulation, yield, reliability, power, and cross-functional design expertise.
SPICE, Verilog, Solido, Monte Carlo
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Hardware Engineer
Santa Clara, California, United States
OnsiteFull Time
Master’s degree in electrical engineering, electronics engineering, or a related engineering field; hardware design experience involving circuits, microprocessors, FPGA, networking, testing, and diagnostics.
FPGA
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