1mo
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FPGA Engineer
El Segundo or Los Angeles or Washington or San Francisco or Seattle or London
$160k-$225k/yr OnsiteFull Time
5+ YOEBachelor's in a relevant field, 5+ years FPGA RTL design experience, Verilog/SystemVerilog, AXI protocols, Vivado and SoC FPGA experience, Bash/Python scripting, U.S. Person required.
Verilog, SystemVerilog, AXI4, AXI4-Lite, AXI4-Stream, Vivado Design Suite, Zynq, Ultrascale, Ultrascale+, Versal, TCP, UDP, IP, I2C, JTAG, UART, SPI, CAN, Bash, Python, Simulink, MATLAB, C, C++, SystemC, Chisel, VHDL, git, Bitbucket CI, Jenkins
2mo
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FPGA Design Engineer
Irvine, California, United States
$100k-$140k/yr OnsiteFull Time
2+ YOEBS in EE or CS with 2+ years FPGA design; Xilinx FPGAs, SoCs, Vivado; TCL or Python; U.S. Person; background check and drug test.
Xilinx FPGAs, Vivado IDE, Tcl, Python, MATLAB, FPGA Design
3w
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Senior FPGA Engineer I/II
Pasadena, California, United States
$143k-$239k/yr OnsiteFull Time
5+ YOEBachelor's in computer or electrical engineering, 5+ years FPGA/Verilog firmware design experience, motor control and DSP experience, FPGA verification/validation, lab debugging, and ability to develop IP from concept.
FPGA, Verilog, Altium Designer, Librero, Simulink, C, Python, MATLAB
1w
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Sr. FPGA Engineer II
Long Beach, California, United States
$143k-$215k/yr OnsiteFull Time
8+ YOEBachelor's in engineering,8+ years FPGA firmware development,proficiency in VHDL,experience with Xilinx/Microchip devices,ability to develop and verify FPGA designs,US citizenship eligibility required.
VHDL, Xilinx, Microchip, UVM, VUnit, GIT, JIRA, GigE, PCIe, SPI, UART, I2C
4d
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Experienced FPGA Developer
Rancho Santa Margarita, California, United States
$55/hr OnsiteContract
7+ YOEBachelor's degree in engineering,7+ years VHDL FPGA design experience, proficiency with Vivado/ModelSim and MicroSemi architecture, experience with I2C/SPI/PCIe and hardware test equipment,US citizenship required,ability to work onsite in Rancho Santa Margarita, CA.
VHDL, Verilog, SystemVerilog, Vivado, ModelSim, MicroSemi, I2C, SPI, PCIe, oscilloscope, spectrum analyzer, logic analyzer, power meter
1mo
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Senior FPGA Engineer
Long Beach, California, United States
$148k-$222k/yr OnsiteFull Time
5+ YOEBachelors in EE/Computer Eng or related; 5+ years FPGA development and high-speed digital systems experience in mission-critical applications; RTL/verification/synthesis/timing expertise; cross-functional collaboration skills.
VHDL, Verilog, SystemVerilog, SpinalHDL, Chisel, Vitis, SystemC, Simulink, RISC-V, AMD Xilinx, Intel, Microchip, CI/CD
3w
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Staff FPGA Engineer, EW
Costa Mesa, California, United States
$220k-$292k/yr OnsiteFull Time
Design and verify FPGA/DSP modules on AMD/Xilinx SoC/FPGA platforms; experience with HDL (VHDL/Verilog), high-speed digital interfaces (PCIe, JESD, Aurora), Linux development, Git and CI/CD; eligible for U.S. Secret clearance; mentoring experience.
AMD, Xilinx, VHDL, Verilog, Linux, Git, TCL, CI/HITL, PCIE, JESD, Aurora, AMD AIE
1w
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Principal Engineer Digital FPGA/Sr. Principal Engineer Digital FPGA (Level 3/4)
Manhattan Beach, California, United States
$125k-$235k/yr OnsiteFull Time
5+ YOEActive SCI clearance required; Bachelor's/Master's/PhD in STEM with 5–8+ years engineering experience depending on level; FPGA, PCB/CCA design and electronics test experience required.
FPGA, PCB, CCA, Analog/RF
3w
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FPGA Design Engineer
Long Beach, California, United States
$135k-$225k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE,5+ years FPGA development with AMD/Xilinx platforms,expertise with Vivado/Vitis and HDL,experience with PCIe/Ethernet/SerDes,hardware/software integration and production bring-up.
Xilinx Vivado, Vitis, Vivado ILA, VIO, Git, Python, TCL, ModelSim, Vivado Simulator, PetaLinux
1mo
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FPGA Electrical Engineer III
Altadena, California, United States
$131k-$183k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
5+ YOEBS in Electrical/Computer Engineering, 5+ years hardware development across product lifecycle, SystemVerilog/Verilog proficiency, SoC and FPGA experience, knowledge of timing, AXI/AHB, synthesis, simulation, and avionics integration.
SystemVerilog, Verilog, Microchip Libero, Python, Linux shell scripting, Windows shell scripting, assembly language, C, C++, MATLAB, Simulink, SPICE, Altium, AXI, AHB
1mo
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Staff FPGA Design Engineer
Irvine, California, United States
$150k-$190k/yr OnsiteFull Time
8+ YOEBachelor's in EE/CE, 8+ years FPGA RTL architecture/development/verification, strong SystemVerilog or VHDL skills, experience with Microship Polarfire/AMD Zynq/Versal/Ultrascale, verification methodologies, Git, Python/Tcl/Bash, C/C++ on Linux, and eligibility for DoD security clearance.
SystemVerilog, VHDL, Microship Polarfire, AMD Zynq US+, Versal, AMD Ultrascale, Vivado, Mentor Modelsim/Questasim, AXI, PCIe, DDR4, DDR5, JESD204B, JESD204C, 100Gb ethernet, SPI, I2C, UART, CAN FD, LVDS, Git, Python, Tcl, Bash, Linux, C/C++
2mo
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Principal FPGA / RTL Design Engineer - Signal Processing
Los Angeles or Irvine
$175k-$225k/yr HybridFull Time
10+ YOEBS in ECE/CS or related; 10+ yrs RTL/FPGA design or 6+ yrs with PhD; Xilinx FPGAs, Vivado; fixed-point DSP; US person.
Xilinx FPGAs, Vivado IDE, Fixed-point arithmetic, Digital Signal Processing, MATLAB, Python, Perl
1mo
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FPGA Verification Engineer II
El Segundo, California, United States
$118k-$142k/yr OnsiteFull Time
2+ YOEBS/MS in CS/EE/CE, 2+ years verification and automation experience, proficiency with VHDL/Verilog/SystemVerilog, UVM/UVMf, DPI-C, TLM, QEMU, VIP, Linux, MATLAB/Python, and Xilinx tools; CI and regression experience.
VHDL, Verilog, SystemVerilog, C, C++, SystemC, UVM, UVMf, DPI-C, TLM, Formal CDC, QEMU, QEMU-RP, VIP, MATLAB, Python, Linux, Xilinx
3w
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ASIC/FPGA Verification Engineer (Experienced, Lead, or Senior)
El Segundo or Huntington Beach or Fairfax
$120k-$239k/yr OnsiteFull Time
5+ YOEBachelor's in engineering or related field, 5+ years ASIC/FPGA verification experience, proficiency in SystemVerilog/UVM, OOP principles, coverage and code-coverage closure, waveform debug, revision control, and Linux.
UVM, SystemVerilog, SystemVerilog Assertions, svn, cvs, git, Linux, Palladium, Make, Perl, Python
3w
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FPGA Verification Engineer, Air Dominance and Strike (Fastwater Staffing)
Costa Mesa, California, United States
RemoteFull Time
2+ YOEBachelor's in EE/CE, 2+ years FPGA/ASIC verification, proficient in SystemVerilog/UVM/SVA, experience with industry simulators, Git and Linux, eligible for U.S. Secret clearance.
SystemVerilog, UVM, SVA, Questa, VCS, Xcelium, Vivado, Git, Linux, SVUnit, Python, Tcl, Makefile, Nix
3w
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ASIC/FPGA Verification Engineer (Experienced, Lead, or Senior)
El Segundo or Huntington Beach or Fairfax
$120k-$239k/yr OnsiteFull Time
5+ YOEBachelor's degree in engineering or related field, 5+ years ASIC/FPGA verification experience, proficiency with SystemVerilog/UVM, SV Assertions, revision control (svn/cvs/git), Linux, and waveform/debug tools; ability to obtain U.S. Secret clearance (U.S. citizenship required).
UVM, SystemVerilog, SystemVerilog Assertions, svn, cvs, git, Linux, Palladium, Make, Perl, Python, ARM, JESD204C, PCIe, Ethernet
2mo
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Electrical Engineer II ASIC/FPGA Verification (Onsite)
El Segundo, California, United States
$76k-$144k/yr OnsiteFull Time
2+ YOEDegree in STEM and at least 2 years of relevant experience; active SECRET security clearance; RTL/VHDL/Verilog experience; testbench development; familiarity with ASIC/FPGA verification.
SystemVerilog, OVM/UVM, VHDL, Verilog, Questasim, Synplify, Quartus, Vivado, C++, Perl, Git, Subversion
2mo
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FPGA/ASIC Design Engineer (Silicon Engineering)
Irvine or Redmond
$125k-$145k/yr OnsiteFull Time
1+ YOEBachelor’s in EE/CE/CS/Physics; 1+ years RTL design (SystemVerilog/Verilog/VHDL); strong Python/C/C++, and PCB/lab experience.
Verilog/SystemVerilog, VHDL, Python, C/C++, Bash, HDL simulators, Spyglass, Vivado, Quartus, AXI/APB/AHB protocols
3w
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
1mo
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Senior Hardware Engineer
Chino, California, United States
$125k-$175k/yr OnsiteFull Time
5+ YOE5+ years mixed-signal hardware engineering experience designing low-noise analog and high-speed digital circuitry for scientific instruments; PCB layout, FPGA/MCU integration, EDA tools, and hands-on lab debugging skills required.
Altium Designer, EDA, FPGA, PS/PL, MCU, ARM, DSP, SPI, I2C, UART, TCP/IP, USB, GPIB, Oscilloscope, Spectrum Analyzer, Logic Analyzer, Function Generator, Linux
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