82 fpga engineer jobs at 37 companies in Wrightwood, CA
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FPGA Engineer
El Segundo or Los Angeles or Washington or San Francisco or Seattle or London
$160k-$225k/yr OnsiteFull Time
5+ YOEBachelor's in a relevant field, 5+ years FPGA RTL design experience, Verilog/SystemVerilog, AXI protocols, Vivado and SoC FPGA experience, Bash/Python scripting, U.S. Person required.
Verilog, SystemVerilog, AXI4, AXI4-Lite, AXI4-Stream, Vivado Design Suite, Zynq, Ultrascale, Ultrascale+, Versal, TCP, UDP, IP, I2C, JTAG, UART, SPI, CAN, Bash, Python, Simulink, MATLAB, C, C++, SystemC, Chisel, VHDL, git, Bitbucket CI, Jenkins
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FPGA Design Engineer
Irvine, California, United States
$100k-$140k/yr OnsiteFull Time
2+ YOEBS in EE or CS with 2+ years FPGA design; Xilinx FPGAs, SoCs, Vivado; TCL or Python; U.S. Person; background check and drug test.
Xilinx FPGAs, Vivado IDE, Tcl, Python, MATLAB, FPGA Design
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Senior FPGA Engineer I/II
Pasadena, California, United States
$143k-$239k/yr OnsiteFull Time
5+ YOEBachelor's in computer or electrical engineering, 5+ years FPGA/Verilog firmware design experience, motor control and DSP experience, FPGA verification/validation, lab debugging, and ability to develop IP from concept.
FPGA, Verilog, Altium Designer, Librero, Simulink, C, Python, MATLAB
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Experienced FPGA Developer
Rancho Santa Margarita, California, United States
$55/hr OnsiteContract
7+ YOEBachelor's degree in engineering,7+ years VHDL FPGA design experience, proficiency with Vivado/ModelSim and MicroSemi architecture, experience with I2C/SPI/PCIe and hardware test equipment,US citizenship required,ability to work onsite in Rancho Santa Margarita, CA.
VHDL, Verilog, SystemVerilog, Vivado, ModelSim, MicroSemi, I2C, SPI, PCIe, oscilloscope, spectrum analyzer, logic analyzer, power meter
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Senior FPGA Engineer I/II
Pasadena, California, United States
$143k-$239k/yr OnsiteFull Time
5+ YOEBachelor's in computer or electrical engineering, 5+ years FPGA firmware design experience with Verilog, proficiency in FPGA verification/validation, motor control and DSP experience preferred, ability to develop IP and support hardware bring-up.
Verilog, AXI Memory Mapped interfaces, HDL, Altium Designer, Librero, Simulink, C, Python, MATLAB, logic analyzer, oscilloscope
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FPGA Electrical Engineer III
Altadena, California, United States
$131k-$183k/yr OnsiteFull Time
Blue Origin: Develops reusable rockets and systems for human spaceflight.
5+ YOEBS in Electrical/Computer Engineering, 5+ years hardware development across product lifecycle, SystemVerilog/Verilog proficiency, SoC and FPGA experience, knowledge of timing, AXI/AHB, synthesis, simulation, and avionics integration.
SystemVerilog, Verilog, Microchip Libero, Python, Linux shell scripting, Windows shell scripting, assembly language, C, C++, MATLAB, Simulink, SPICE, Altium, AXI, AHB
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Staff FPGA Design Engineer
Irvine, California, United States
$150k-$190k/yr OnsiteFull Time
8+ YOEBachelor's in EE/CE, 8+ years FPGA RTL architecture/development/verification, strong SystemVerilog or VHDL skills, experience with Microship Polarfire/AMD Zynq/Versal/Ultrascale, verification methodologies, Git, Python/Tcl/Bash, C/C++ on Linux, and eligibility for DoD security clearance.
SystemVerilog, VHDL, Microship Polarfire, AMD Zynq US+, Versal, AMD Ultrascale, Vivado, Mentor Modelsim/Questasim, AXI, PCIe, DDR4, DDR5, JESD204B, JESD204C, 100Gb ethernet, SPI, I2C, UART, CAN FD, LVDS, Git, Python, Tcl, Bash, Linux, C/C++
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Principal FPGA / RTL Design Engineer - Signal Processing
Los Angeles or Irvine
$175k-$225k/yr HybridFull Time
10+ YOEBS in ECE/CS or related; 10+ yrs RTL/FPGA design or 6+ yrs with PhD; Xilinx FPGAs, Vivado; fixed-point DSP; US person.
Xilinx FPGAs, Vivado IDE, Fixed-point arithmetic, Digital Signal Processing, MATLAB, Python, Perl
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FPGA/ASIC Design Engineer (Silicon Engineering)
Irvine or Redmond
$125k-$145k/yr OnsiteFull Time
1+ YOEBachelor’s in EE/CE/CS/Physics; 1+ years RTL design (SystemVerilog/Verilog/VHDL); strong Python/C/C++, and PCB/lab experience.
Verilog/SystemVerilog, VHDL, Python, C/C++, Bash, HDL simulators, Spyglass, Vivado, Quartus, AXI/APB/AHB protocols
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Senior ASIC/FPGA Verification Engineer (Onsite)
El Segundo or Fullerton
$96k-$182k/yr OnsiteFull Time
5+ YOEActive transferable U.S. SECRET clearance and U.S. citizenship, STEM degree (BS or advanced) with 5+ years (BS) or 3+ years (advanced) experience, RTL verification using VHDL/Verilog/SystemVerilog, testbench and coverage, and revision control (Git/Subversion).
SystemVerilog, OVM, UVM, VHDL, Verilog, Git, Subversion, QuestaSim, Synplify, Quartus, Vivado, Unix, Linux
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Electrical Engineer II
Garden Grove, California, United States
$120k-$150k/yr OnsiteFull Time
2+ YOEBachelor's degree in electrical, electronics, or computer engineering plus 2 years' experience; requires component engineering, electronic product design, embedded systems, FPGA, schematic capture, debugging, technical writing, and U.S. citizenship.
FPGA, Altium, SiliconExpert, Z2Data, Ethernet, NTP, PTP, PTTI, BOM, MTBF, FMECA
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Hardware Engineer III
Irvine, California, United States
$120k-$140k/yr OnsiteFull Time
3+ YOEBachelor's in Electrical Engineering, 3–7 years hardware design experience with processors/FPGAs, DDR and high-speed interfaces, PCB/schematic tools (Orcad Capture, PADS Layout), lab equipment experience, and C/C++ or Python proficiency.
Orcad Capture, PADS Layout, C/C++, Python, Linux, Xilinx, Intel FPGA, Oscilloscope, Spectrum Analyzer, Logic Analyzer, Power Analyzer
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Architecture and System Design Engineer
Irvine, California, United States
$124k-$165k/yr OnsiteFull Time
Master's or PhD in electrical engineering, advanced electronics architecture and system design expertise, circuit and PCB design, signal integrity/EMC, C/C++/Python, FPGA, CAD tools, leadership and mentoring experience.
C, C++, Python, FPGA, CAD tools
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Senior Principal Digital Engineer
Los Angeles, California, United States
$156k-$235k/yr OnsiteFull Time
8+ YOEU.S. citizen with active Secret clearance. Requires extensive high-speed digital design and verification experience, FPGA/SoC/ASIC implementation skills (VHDL/Verilog), and STEM degree with significant experience.
VHDL, Verilog, System Verilog, UVM, MATLAB, Simulink, FPGA, SoC, ASIC, Electronic Hardware-In-Loop
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Lead Electronics Design Engineer
Hampton or Greenbelt or Huntsville or Dallas or Houston or Denver or Mountain View or Edwards Air Force Base
$93k-$137k/yr OnsiteFull Time
3+ YOEBachelor's in EE/CE or related, 3+ years electronic design experience with SPICE tools, hands-on circuit design, FPGA/VHDL development, Altium/PSPICE familiarity, strong written and oral communication.
Altium Designer, PSPICE, VHDL, Field Programmable Gate Array (FPGA), Simulation Program with Integrated Circuit Emphasis (SPICE), oscilloscope, spectrum analyzer, logic analyzer
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Digital Design Principal Engineer/Manager
Irvine, California, United States
$190k-$225k/yr OnsiteFull Time
20+ YOE20+ years FPGA/SoC development with leadership experience; MS in Electrical Engineering; deep Verilog/SystemVerilog expertise; FPGA/ASIC implementation and packet processing experience; scripting in C/C++, Perl, Tcl, Python.
Verilog, SystemVerilog, AMD (Xilinx Vivado), C, C++, Perl, Tcl, Python, Claude Code, Copilot
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Staff Electronics Design Engineer
Palo Alto or Irvine
$167k-$209k/yr OnsiteFull Time
6+ YOEAdvanced degree and extensive electrical hardware design experience (analog, digital, mixed-signal), schematic/PCB/FPGA work, C programming, signal integrity, test equipment proficiency, and automotive product development experience.
Spice, Matlabs, C, FPGA, Oscilloscope, Logic Analyzer, Spectrum Analyzer, Power Supply
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Firmware Engineer
Irvine, California, United States
$145k-$175k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE,5+ years FPGA firmware experience with VHDL/Verilog,3+ years Xilinx tool experience,SoC/PS-PL integration,FPGA DSP implementation,EMB Linux/bare-metal familiarity,strong verification and debug skills.
VHDL, Verilog, Vivado, Vitis, Vivado HLS, UVM, Git, oscilloscope, logic analyzer, spectrum analyzer
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Senior Staff Digital Design Engineer
Irvine, California, United States
$136k-$201k/yr OnsiteFull Time
Bachelor's degree in EE/CE/CS, RTL development with Verilog/SystemVerilog, synthesis/timing/CDC/low-power checks, debug via simulation/emulation/FPGA/silicon, verification/UVM preferred, mentoring and sub-circuit ownership experience.
Verilog, SystemVerilog, UVM, FPGA
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Electronics Engineer
Pasadena, California, United States
OnsiteFull Time
4+ YOEBachelor’s in electrical engineering or physics; 4+ years of related experience; strong electronics design and data analysis skills; experience integrating hardware/software systems; collaborative; some travel; able to lift 25 lbs.
Low Noise Analog Circuit Design, Servo Design and Tuning, Grounding and RI Shielding, Packaging of Low Noise Electronics, High Speed Analog and Digital Signal Transmission, Gate Array Programming, State Machine Design, Schematic Capture, Circuit Simulation, PCB Layout, Cryogenic Vacuum Systems, C++, UNIX, Python, MATLAB, FPGA, Digital Logic Design, DSP Programming
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