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223 fronted engineer jobs at 135 companies in San Francisco, CA

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Optical Sensing HW - Electrical Engineer
Cupertino, California, United States
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
Analog, board-level design experience; experience with photodiode front-ends, LED/VCSEL drivers, and basic optics is a plus; strong engineering problem-solving and collaboration skills.
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4w
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Senior Logic Design Engineer
Sunnyvale, California, United States
$170k-$250k/yr OnsiteFull Time
Lyte
Lyte: Develops unified perception platforms for robotics and physical AI.
10+ YOEBachelor's in Electrical/Computer Engineering, 10+ years front-end digital SoC experience, Verilog/SystemVerilog and synthesis expertise, embedded/mixed-mode design and strong debugging and communication skills.
Verilog, SystemVerilog
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1w
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Staff SoC RTL Engineer
Burlingame, California, United States
$175k-$230k/yr HybridFull Time
Quadric
Quadric: Designing licensable processor IP for on-device AI inference.
5+ YOEBS, MS, or Ph.D. in electrical or computer engineering; 5+ years of SoC/ASIC front-end design and integration; SystemVerilog or Verilog; computer architecture, low-power design, subsystem, and VCS experience.
SystemVerilog, Verilog, VCS, C++, FPGA
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Senior RF Front-End Design Engineer
South San Francisco, California, United States
OnsiteFull Time
Zipline
Zipline: Operates an autonomous drone delivery system for medical supplies.
7+ YOEBachelor's in EE, typically 7+ years designing RF front-end or wireless systems, expertise in multi-radio integration, RF coexistence, validation, certification, and mentoring engineers.
Keysight ADS, Cadence AWR, Ansys HFSS, CST Studio Suite, Python, MATLAB, vector network analyzers, spectrum analyzers, signal generators, power meters, network emulators, OTA chambers
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3w
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Sr. Logic Design Engineer
Santa Clara or Phoenix or Hillsboro
$142k-$200k/yr HybridFull Time
Intel
IntelNasdaq: INTC: Designs and manufactures microprocessors and semiconductor components.
4+ YOEBachelor's in Electrical/Computer Engineering with 4+ years (or Master's w/2+, PhD w/1+) and experience in RTL/System Verilog, front-end lint/synthesis tools, VCS/Verdi, UPF, CDC and IP environment.
System Verilog, VCS, Verdi, UPF, Lint, Synthesis
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Mid Level ASIC Design Engineer
Sunnyvale or Munich
OnsiteFull Time
Tensordyne
Tensordyne: Designs AI chips and systems for efficient model inference.
3+ YOERequires 3+ years of ASIC RTL design experience with Verilog or SystemVerilog, CPU IP integration, processor architecture and interface knowledge, front-end ASIC tools, low-power design, and a bachelor's degree in electrical or computer engineering.
Verilog, SystemVerilog, ARM, RISC-V, MIPS, AMBA, APB, AXI, SPI, eMMC, MII, GPIO, I2C, UPF
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3w
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Product Engineer
Santa Clara, California, United States
HybridFull Time
Teserac
Teserac: AI-native observability and workflow automation for data centers.
Strong UX/UI and design-system ownership, ability to run design reviews and UAT, front-end development with React and TypeScript, fix production UI issues, use AI-assisted tooling, and work in early-stage environments. Must be eligible to work in the US.
React, TypeScript, CSS, Tailwind, Cursor, Claude Code, Copilot, Vite, Django, Python
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Lead Sensors Engineer
San Francisco, California, United States
OnsiteFull Time
Sabi
Sabi: Building noninvasive, wearable brain-computer interface technology.
10+ YOE10+ years in sensor or hardware development for consumer wearables, deep expertise in optical PPG, analog front-end design, sensor integration, BOM ownership, lab instrumentation experience, and shipping end-to-end sensing systems.
oscilloscope, logic analyzer
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3w
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ASIC Engineer, Implementation - Timing
Sunnyvale or Austin
$146k-$209k/yr OnsiteFull Time
Meta
MetaNASDAQ: META: Develops social networking platforms and virtual reality technologies.
6+ YOEBachelor's degree or equivalent,6+ years timing analysis experience, STA and timing-constraint development, knowledge of front-end and back-end ASIC flows, and cross-team communication skills.
PrimeTime, DMSA, Fusion Compiler, Innovus, Design Compiler, Genus
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Senior Engineer, GPU RTL Design
Austin or San Jose
$124k-$208k/yr OnsiteFull Time
Samsung Electronics
Samsung ElectronicsKorea Exchange: 005930: Develops and manufactures consumer electronics, semiconductors, and mobile devices.
4+ YOEMaster’s in Electrical/Computer Engineering required for senior/staff; Senior requires 4+ years. Requires RTL design experience (Verilog/SystemVerilog), ASIC front-end flow familiarity, microarchitecture knowledge, and ability to access export-controlled information.
Verilog, SystemVerilog
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1w
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Senior Staff RTL Design Engineer - CPU Frontend
Santa Clara, California, United States
$206k-$251k/yr OnsiteFull Time
SiFive
SiFive: Designs and licenses high-performance RISC-V processor intellectual property.
7+ YOEBS/MS in CS/CE/EE or equivalent,7+ years RTL/CPU microarchitecture experience,Proficient in Verilog/SystemVerilog/VHDL,software engineering skills,experience with CPU front-end blocks and verification.
Verilog, SystemVerilog, VHDL, Chisel, FIRRTL, Scala, Bluespec, Git, GitHub, Jira, Confluence, UVM
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Principal Engineer - Digital ASIC Design
San Jose, California, United States
$70k-$163k/yr OnsiteFull Time
Microchip Technology
Microchip TechnologyNasdaq: MCHP: Manufacturer of microcontrollers, analog, and mixed-signal integrated circuits.
10+ YOE10+ years ASIC/FPGA digital design; SystemVerilog; Cadence/Synopsys front-end; PHY/Serdes knowledge; post-silicon validation; travel up to 25%.
System Verilog, Cadence Tools, Synopsys Tools, VCS, SpyGlass, Design Compiler, PrimeTime, Lab equipment
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Lead Engineer, RF & Electrical —Antenna Systems
Saratoga or Texas
$180k-$220k/yr OnsiteFull Time
E-Space
E-Space: Builds sustainable LEO satellite networks for global IoT connectivity
BS or MS in EE/RF, lead-level antenna and phased-array hardware experience, RF front-end/module electronics, RF test leadership, experience leading multidisciplinary engineering teams; space/LEO experience preferred.
HFSS
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3w
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Applied Research Engineer, Chip Design
Santa Clara, California, United States
$192k-$357k/yr HybridFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
8+ YOEMS/PhD or equivalent experience, 8+ years industry experience in front-end ASIC design/verification, hands-on with LLMs/agentic AI, custom model training, and infrastructure experience.
LLMs, RL, RLHF, RLAIF, Docker, Slurm, CI/CD
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Senior Front End Design Engineer (Microarchitecture)
Sunnyvale, California, United States
$250k-$300k/yr HybridFull Time
Cerebras Systems
Cerebras SystemsNasdaq: CBRS: Manufactures specialized computer chips designed for AI.
8+ YOEMaster's in CS or EE required, 8+ years delivering high-performance RTL designs, front-end chip and IP integration, networking and PCIe/Serdes knowledge, Python and TCL scripting, silicon bring-up experience.
Python, TCL, TCP/IP, RDMA, Ethernet, PCIe, Serdes
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Lead ASIC Design Engineer
San Jose, California, United States
$144k-$230k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
12+ YOE12+ years ASIC/SoC digital design experience, BS/MS in EE/CE, expert SystemVerilog/Verilog, front-end EDA tool fluency, proven tape-out history, US work authorization, strong communication and mentoring skills.
SystemVerilog, Verilog, SDC, CDC, Design Compiler, Genus, PrimeTime, Tempus, Lint, SpyGlass, JasperGold CDC, Synopsys, Cadence, Python, Tcl, Perl
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2w
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Senior Design Engineer
San Francisco, California, United States
$177k-$329k/yr RemoteFull Time
GitHub
GitHubNASDAQ: MSFT: Cloud-based platform for software development and version control.
7+ YOE7+ years front-end engineering experience or equivalent; strong skills in front-end technologies, design systems, prototyping, accessibility, and working with AI-enabled design workflows.
Figma, React, CSS, HTML, JavaScript, TypeScript, Copilot
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4w
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Software Engineer
San Francisco, California, United States
$166k-$200k/yr HybridFull Time
Zania
Zania: Automates enterprise risk and compliance using agentic AI teammates.
3+ YOEBachelor's degree in CS/Engineering/IT, 3+ years engineering experience, front-end and back-end proficiency, cloud and container experience, security-focused development skills.
HTML, CSS, JavaScript, React, Angular, Node.js, Python, Django, Spring, AWS, Microsoft Azure, GCP, Docker, Kubernetes, OAuth
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Radio Frequency Hardware Engineer
San Francisco, California, United States
$139k-$205k/yr OnsiteFull Time
DoorDash
DoorDashNASDAQ: DASH: On-demand delivery platform connecting consumers with local merchants.
6+ YOEBachelor's or Master's in EE, 6+ years RF hardware design experience for mass-produced products, expertise in RF front-end, desense mitigation, EMI/EMC debugging, lab/OTA testing, and familiarity with high-speed digital interfaces.
CST, HFSS, ADS, MIPI CSI, MIPI DSI, PCIe, DDR, SDIO, eMMC, oscilloscope, spectrum analyzer, network analyzer
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Product Engineer
San Francisco, California, United States
$130k-$200k/yr OnsiteFull Time
Mintlify
Mintlify: AI-powered platform for generating and hosting software documentation.
Product-minded engineer with a distinct depth; capable of both front-end and back-end work; ownership of features and collaboration.
React, JavaScript, TypeScript, Backend
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