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91 ir engineer jobs at 42 companies in Berkeley, CA

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Senior EM/IR Engineer
Saratoga, California, United States
$120k-$220k/yr OnsiteFull Time
E-Space
E-Space: Builds sustainable LEO satellite networks for global IoT connectivity
8+ YOE8+ years EM/IR analysis for complex ASICs/SoCs; power integrity; PDN design and sign-off; Verilog/SystemVerilog/UVM; scripting (Python/Tcl); experience with Cadence Voltus and Synopsys RedHawk.
Cadence Voltus, Synopsys RedHawk, Verilog, SystemVerilog, UVM, VHDL, Tcl, Python
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3mo
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CAD Gate-level 3DIC EM/IR Engineer
Austin or Sunnyvale
OnsiteFull Time
Apple
AppleNASDAQ: AAPL: Designs and sells consumer electronics, software, and online services.
3+ YOEBS degree + 3 years experience; EDA/EMIR tools experience; scripting in Tcl/Python/Perl; EM/IR analysis and design experience.
Voltus, VoltusFi, RedHawk-SC, Totem, EDA Tools, Scripting (Python, Tcl, Perl)
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3w
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EMIR Engineer, Annapurna Labs - Cloud Scale Machine Learning
Austin or Cupertino
$136k-$213k/yr OnsiteFull Time
Amazon
AmazonNASDAQ: AMZN: Global online retail and cloud computing technology provider.
Experienced EM/IR engineer for SoC EMIR sign-off, power-grid design and analysis, EMIR flow setup, cross-domain IR analysis (die/package/board), EDA tool collaboration, and post-silicon correlation.
SystemVerilog, Make, FusionCompiler, Innovus, PrimePower, PrimeTime, ARM
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Process Engineer II Senior
Santa Clara, California, United States
$100k-$137k/yr OnsiteFull Time
Applied Materials
Applied MaterialsNASDAQ: AMAT: Manufacturers of equipment for semiconductor and display production.
3+ YOEMS/PhD in materials science, chemistry, chemical engineering or related; 3+ years' semiconductor metrology/process development experience; expertise in AFM and IR characterization, DOE, cleanroom hands-on operation, data analysis, and strong communication.
AFM, Infrared (IR) spectroscopy, Design of Experiments (DOE)
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Staff Analog Layout Engineer
San Jose or Hsinchu
OnsiteFull Time
Neurophos
Neurophos: Develops high-performance photonic processors for AI inference acceleration.
3+ YOESenior/Staff level IC layout engineer with 3-8+ years in deep-submicron analog/RF layouts; strong EDA/tool experience and EM/IR knowledge.
Cadence Virtuoso, Synopsys Custom Compiler, Mentor Calibre, Siemens ICV
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Senior Systems Engineer
Milpitas, California, United States
$128k-$192k/yr OnsiteFull Time
Onto Innovation
Onto InnovationNYSE: ONTO: Provides metrology and inspection solutions for semiconductor manufacturers.
2+ YOEPhD in Engineering or Sciences (optical physics focus); 2-3 years in optical systems or hardware; 2-3 years in laser systems with mid-IR; experience with precision optics; Python/ Matlab proficiency; willing to travel up to 20%.
Python, Matlab
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ASIC Design Engineer
Santa Clara, California, United States
$116k-$190k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs GPU-accelerated computing and artificial intelligence hardware.
3+ YOEMS in Electrical or Computer Engineering (or equivalent), 3+ years experience, strong background in advanced submicron process issues, standard cell and custom ROM design, SPICE and DRC/LVS experience, EM/IR and variation simulations, and scripting (Perl, Tcl, Make).
SPICE, EM/IR, DRC/LVS, Perl, Tcl, Make, RTL
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3w
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Principal Design Engineer
San Jose or Cary
$137k-$254k/yr OnsiteFull Time
Cadence Design Systems
Cadence Design SystemsNASDAQ: CDNS: Develops computational software and hardware for electronic system design.
1+ YOEBS/MS/PhD in Electrical Engineering with 7/5/1+ years respectively; experience with Cadence Innovus/Tempus/QRC/Voltus/Pegasus and Palladium/Protium; Linux and Shell/Perl/TCL scripting; RTL synthesis, floorplanning, timing closure, IR drop, and industry interfaces (PCIe, DDR, LPDDR, SRAM, UCIe).
Innovus, Tempus, QRC, Voltus, Pegasus, Palladium, Protium, Linux, Shell, Perl, TCL
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Physical IC Design Engineer
San Jose, California, United States
$144k-$230k/yr OnsiteFull Time
Broadcom
BroadcomNASDAQ: AVGO: Designs and sells semiconductors and infrastructure software to enterprises.
12+ YOE12+ years experience in full physical design cycle (RTL to tape-out). Bachelor’s in Electrical/Electronics Engineering, Tcl/Perl scripting, proficiency with EDA tools, timing closure, EM/IR analysis, and strong communication skills.
Tcl, Perl, EDA Tools
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Senior ASIC Power Delivery Engineer
Sunnyvale, California, United States
$163k-$237k/yr OnsiteFull Time
Google
GoogleNASDAQ: GOOGL: Provides online search, advertising, cloud computing, and consumer electronics.
8+ YOEBachelor's degree or equivalent; 8+ years in physical design with power delivery and advanced process nodes; experience with power grid integrity (EM/IR), place-and-route, and design-rule-check flows; EM/IR analysis and verification skills.
Unified Power Format (UPF)
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Power Systems Design Engineer
San Jose, California, United States
OnsiteFull Time
Etched
Etched: Designs specialized AI chips optimized for transformer architectures.
8+ YOEBachelor’s in Electrical Engineering; 8+ years in power supply design for high-power processors; multi-phase power, 48V input conversion; PCB IR drop and power loss simulations; Cadence Voltus familiarity; willingness to apply even if not meeting every qualification.
Cadence Voltus IC Power Integrity Solution
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Vision Systems Engineer
San Francisco, California, United States
OnsiteFull Time
Exploration Technology Group
Exploration Technology Group: Designs and builds hardware for space and defense missions.
5+ YOE5+ years in IR sensor systems, EO payloads, or space imaging; strong Kalman filtering, tracking, data association; CNNs/ML for real-time embedded inference; MATLAB/Python with production C++ experience.
Kalman filters (EKF, UKF), multi-target tracking, data association (JPDA, MHT), MATLAB, Python, C++, CNNs, embedded FPGA and GPU, radiometric modeling, Monte Carlo, hardware-in-the-loop
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Senior DFX Power Methodology Engineer
Santa Clara, California, United States
$196k-$368k/yr OnsiteFull Time
NVIDIA
NVIDIANASDAQ: NVDA: Designs graphics processing units and artificial intelligence hardware.
6+ YOEEngineering degree or equivalent experience with 6+–12+ years in DFT/power; strong knowledge of DFT, VLSI power/timing/voltage noise; experience with power/thermal/IR drop analysis, post-silicon debug, AI/ML for EDA, and statistical data analysis.
Power Analysis, Thermal Analysis, IR Drop tools, Applied ML, Gen AI, statistical tools, RTL, STA, place-n-route, ATE, SLT
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Physical Design Engineer
Sunnyvale, California, United States
$230k-$280k/yr OnsiteFull Time
Cerebras Systems
Cerebras SystemsNasdaq: CBRS: Manufactures specialized computer chips designed for AI.
10+ YOE10+ years physical design experience; expertise in full-chip physical verification, DRC/LVS resolution with ICV or Calibre, IR/EM analysis, 3D/2.5D packaging and die stacking; scripting with Tcl and Python; familiarity with Synopsys tools.
Synopsys, ICV, Calibre, Tcl, Python
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3mo
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Principal (STA/ Sign-Off) Engineer-17042 (Austin/ Sunnyvale)
Sunnyvale or Austin
$191k-$286k/yr OnsiteFull Time
Synopsys
SynopsysNasdaq: SNPS: Provides software and IP for semiconductor design and manufacturing.
12+ YOEBS/MS in Electrical Engineering, 12+ years developing CAD flows for high-speed digital IP/SOCs, hands-on STA and EM/IR signoff experience, familiarity with Synopsys tools (StarRC, ICV), strong communication and problem-solving.
Static Timing Analysis (STA), EM/IR, StarRC, ICV, PDK
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Senior Staff Applied AI Engineer - Context Retrieval
Mountain View or San Francisco
$229k-$343k/yr HybridFull Time
Databricks
Databricks: A unified platform for data analytics and artificial intelligence.
10+ YOE10+ years software engineering; deep IR and retrieval systems experience; expertise in LLM-era retrieval and agentic systems; experience building 0→1 retrieval stacks and multi-source data retrieval.
BM25, Lucene, Elasticsearch, OpenSearch, FAISS, ScaNN, HNSW, embeddings, nDCG, MRR, Recall@K, RAG, Python, Java, SQL
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Senior Software Engineer - Static Analysis
San Jose, California, United States
RemoteFull Time
Kai Cyber
Kai Cyber: Agentic AI platform for autonomous enterprise cybersecurity operations.
7+ YOE7+ years software engineering (4+ in static/program analysis or compiler infrastructure); deep knowledge of control/data-flow, call graph construction, inter-procedural and taint/reachability analysis; strong Java/Go/C++ skills; IR/bytecode/AST experience; technical ownership.
Java, Go, C++, LLVM, MLIR, SSA, IR, bytecode, ASTs, CI/CD
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Physical Design Engineer
San Jose, California, United States
$150k-$250k/yr OnsiteFull Time
Fortell
Fortell: AI-powered hearing aids providing enhanced speech clarity.
7+ YOE7+ years physical design experience (synthesis, PnR, STA, timing convergence, physical verification); Bachelor's in EE/CE/CS or equivalent experience; proficiency with Innovus, Tempus, Quantus, TCL; experience with EM/IR, PDN, LEC and sub-7nm/SoC design.
Innovus, Tempus, Quantus, TCL, Cadence, Synopsys
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Power Integrity Engineer-Silicon
San Jose, California, United States
OnsiteFull Time
Lumilens
Lumilens: Designs photonic interconnects for AI supercomputing infrastructure.
7+ YOE10+ years PI experience with bachelor’s (or 7+ with advanced degree); deep power integrity expertise for 2.5D/3D packaging, PDN design, transient/EM/IR analysis, simulation tool proficiency, and cross-functional leadership.
Ansys SIwave, HFSS, Cadence Sigrity, Apache RedHawk, Voltus, Keysight ADS
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Senior Compiler Engineer, GPU Code Object Rewriting & Tooling
San Jose, California, United States
$179k-$306k/yr HybridFull Time
AMD
AMDNASDAQ: AMD: Designs and manufactures computer processors and graphics technology.
Expertise in GPU microarchitecture and performance modeling, strong C++ systems programming, compiler/IR experience, simulation and profiler validation, technical leadership, and preferred advanced degree in CS/CE/EE or equivalent experience.
C++, AMDGPU, GCN, RDNA, CDNA, ROCm, HIP, HSA, AMDGPU LLVM backend, ROCprof, ROCm Compute Profiler, Nsight Compute, LLVM, MLIR, GCC, LLVM MC, ELF, DWARF
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