Half Moon Bay • 50 milesRemote · Hybrid · Onsite · Field · All Environments
Half Moon Bay • 50 milesRemote · Hybrid · Onsite · Field · All Environments
Half Moon Bay • 50 milesRemote · Hybrid · Onsite · Field · All Environments
Half Moon Bay • 50 milesRemote · Hybrid · Onsite · Field · All Environments
66 ir engineer jobs at 34 companies in Half Moon Bay, CA
3mo
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Senior EM/IR Engineer
Saratoga, California, United States
$120k-$220k/yr OnsiteFull Time
8+ YOE8+ years EM/IR analysis for complex ASICs/SoCs; power integrity; PDN design and sign-off; Verilog/SystemVerilog/UVM; scripting (Python/Tcl); experience with Cadence Voltus and Synopsys RedHawk.
Cadence Voltus, Synopsys RedHawk, Verilog, SystemVerilog, UVM, VHDL, Tcl, Python
3w
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Software Engineer, IR Data Products
San Jose, California, United States
$156k-$186k/yr HybridFull Time
3+ YOEBS, MS, PhD, or equivalent experience; 3–5+ years relevant experience; strong Python skills; AWS or cloud infrastructure, containerized deployment, scalable data systems, and interdisciplinary collaboration.
Python, AWS, XArray, COG, GeoTIFF, NetCDF, GDAL, Zarr, Flyte, Airflow, Terraform
6d
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Senior SRAM Engineer
Santa Clara or United States
$196k-$311k/yr HybridFull Time
12+ YOEBS/MS/PhD or equivalent in Electrical or Computer Engineering, 12+ years of circuit design experience, and strong SRAM and memory design expertise. Experience with industry tools, analysis flows, and scripting is preferred.
Cadence Virtuoso, SPICE, Perl, Python, Shell, Verilog, Static Timing Analysis, EM, IR
2mo
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EMIR Engineer, Annapurna Labs - Cloud Scale Machine Learning
Austin or Cupertino
$136k-$213k/yr OnsiteFull Time
Experienced EM/IR engineer for SoC EMIR sign-off, power-grid design and analysis, EMIR flow setup, cross-domain IR analysis (die/package/board), EDA tool collaboration, and post-silicon correlation.
SystemVerilog, Make, FusionCompiler, Innovus, PrimePower, PrimeTime, ARM
1mo
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AI Engineer, Search & Knowledge Systems
San Francisco, California, United States
OnsiteFull Time
Experience building production search, retrieval, and knowledge systems; strong software engineering in Python or TypeScript; hands-on with RAG, embeddings, vector search, rerankers, and IR concepts; security and production-readiness mindset.
Python, TypeScript, Embedding models, Rerankers, Lexical search, Semantic search, Hybrid search, Vector search, PostgreSQL, Docker
2mo
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ASIC Design Engineer
Santa Clara, California, United States
$116k-$190k/yr OnsiteFull Time
3+ YOEMS in Electrical or Computer Engineering (or equivalent), 3+ years experience, strong background in advanced submicron process issues, standard cell and custom ROM design, SPICE and DRC/LVS experience, EM/IR and variation simulations, and scripting (Perl, Tcl, Make).
SPICE, EM/IR, DRC/LVS, Perl, Tcl, Make, RTL
2mo
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Principal Design Engineer
San Jose or Cary
$137k-$254k/yr OnsiteFull Time
1+ YOEBS/MS/PhD in Electrical Engineering with 7/5/1+ years respectively; experience with Cadence Innovus/Tempus/QRC/Voltus/Pegasus and Palladium/Protium; Linux and Shell/Perl/TCL scripting; RTL synthesis, floorplanning, timing closure, IR drop, and industry interfaces (PCIe, DDR, LPDDR, SRAM, UCIe).
Innovus, Tempus, QRC, Voltus, Pegasus, Palladium, Protium, Linux, Shell, Perl, TCL
1mo
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PD Engineer
Santa Clara, California, United States
$107k-$161k/yr OnsiteFull Time
2+ YOE2+ years physical design experience with floorplanning, place-and-route, timing closure, ECOs, IR drop and physical/formal verification; scripting in Python, PERL, TCL; Linux/Unix shell; Bachelor's degree required.
Cadence Innovus, Synopsys Fusion Compiler, Synopsys PTSI, Python, PERL, TCL, Linux/Unix shell
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Staff GenAI Engineer - Early PDN Modeling
San Jose, California, United States
$170k-$290k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE/CS,5+ years in power integrity/PDN/circuit/physical/package/EDA workflows,production-quality Python coding,ML/AI applied to engineering workflows,understanding of PDN and IR drop analysis.
Python
2mo
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Physical IC Design Engineer
San Jose, California, United States
$144k-$230k/yr OnsiteFull Time
12+ YOE12+ years experience in full physical design cycle (RTL to tape-out). Bachelor’s in Electrical/Electronics Engineering, Tcl/Perl scripting, proficiency with EDA tools, timing closure, EM/IR analysis, and strong communication skills.
Tcl, Perl, EDA Tools
3mo
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Vision Systems Engineer
San Francisco, California, United States
OnsiteFull Time
5+ YOE5+ years in IR sensor systems, EO payloads, or space imaging; strong Kalman filtering, tracking, data association; CNNs/ML for real-time embedded inference; MATLAB/Python with production C++ experience.
Kalman filters (EKF, UKF), multi-target tracking, data association (JPDA, MHT), MATLAB, Python, C++, CNNs, embedded FPGA and GPU, radiometric modeling, Monte Carlo, hardware-in-the-loop
1mo
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Power Integrity Engineer
San Jose, California, United States
OnsiteFull Time
5+ YOEB.S./M.S. in EE,5+ years PI experience on high-current/high-performance designs, proficiency with PI EDA tools, DC IR-drop and AC impedance analysis, VRM and PCB stack-up knowledge.
Cadence Allegro, Sigrity PowerDC, PowerSI, OptimizePI, Ansys SIwave, Python, MATLAB
2mo
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Senior DFX Power Methodology Engineer
Santa Clara, California, United States
$196k-$368k/yr OnsiteFull Time
6+ YOEEngineering degree or equivalent experience with 6+–12+ years in DFT/power; strong knowledge of DFT, VLSI power/timing/voltage noise; experience with power/thermal/IR drop analysis, post-silicon debug, AI/ML for EDA, and statistical data analysis.
Power Analysis, Thermal Analysis, IR Drop tools, Applied ML, Gen AI, statistical tools, RTL, STA, place-n-route, ATE, SLT
2mo
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Physical Design Engineer
Sunnyvale, California, United States
$230k-$280k/yr OnsiteFull Time
10+ YOE10+ years physical design experience; expertise in full-chip physical verification, DRC/LVS resolution with ICV or Calibre, IR/EM analysis, 3D/2.5D packaging and die stacking; scripting with Tcl and Python; familiarity with Synopsys tools.
Synopsys, ICV, Calibre, Tcl, Python
1mo
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Senior Security Engineer II
San Francisco, California, United States
$149k-$235k/yr HybridFull Time
5+ YOESeveral years owning cloud security in production (including on-call), hands-on AWS and GCP, self-managed Kubernetes, Python and Terraform coding, detection/IR experience, and strong architecture and IAM skills.
AWS, GCP, Kubernetes, MongoDB, CrowdStrike, Tenable, Python, Terraform, SIEM
1w
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Principal Physical Design Engineer
San Jose or Irvine
$150k-$250k/yr OnsiteFull Time
5+ YOE5+ years of ASIC physical design experience, advanced-node tapeout expertise, EDA tool proficiency, and expertise in synthesis, power analysis, EM/IR cleanup, timing closure, and physical verification.
System-on-Chips (SoCs), RTL, GDSII, Static Timing Analysis (STA), Design Rule Checking (DRC), Layout Versus Schematic (LVS), Tcl, Python, Perl, Cadence Innovus, Cadence Tempus, Cadence Voltus, Cadence Pegasus, Calibre
2mo
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Senior Software Engineer - Static Analysis
San Jose, California, United States
RemoteFull Time
7+ YOE7+ years software engineering (4+ in static/program analysis or compiler infrastructure); deep knowledge of control/data-flow, call graph construction, inter-procedural and taint/reachability analysis; strong Java/Go/C++ skills; IR/bytecode/AST experience; technical ownership.
Java, Go, C++, LLVM, MLIR, SSA, IR, bytecode, ASTs, CI/CD
1mo
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Physical Design Engineer
San Jose, California, United States
$150k-$250k/yr OnsiteFull Time
7+ YOE7+ years physical design experience (synthesis, PnR, STA, timing convergence, physical verification); Bachelor's in EE/CE/CS or equivalent experience; proficiency with Innovus, Tempus, Quantus, TCL; experience with EM/IR, PDN, LEC and sub-7nm/SoC design.
Innovus, Tempus, Quantus, TCL, Cadence, Synopsys
3mo
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Senior Staff Applied AI Engineer - Context Retrieval
Mountain View or San Francisco
$229k-$343k/yr HybridFull Time
10+ YOE10+ years software engineering; deep IR and retrieval systems experience; expertise in LLM-era retrieval and agentic systems; experience building 0→1 retrieval stacks and multi-source data retrieval.
BM25, Lucene, Elasticsearch, OpenSearch, FAISS, ScaNN, HNSW, embeddings, nDCG, MRR, Recall@K, RAG, Python, Java, SQL
2mo
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Power Integrity Engineer-Silicon
San Jose, California, United States
OnsiteFull Time
7+ YOE10+ years PI experience with bachelor’s (or 7+ with advanced degree); deep power integrity expertise for 2.5D/3D packaging, PDN design, transient/EM/IR analysis, simulation tool proficiency, and cross-functional leadership.
Ansys SIwave, HFSS, Cadence Sigrity, Apache RedHawk, Voltus, Keysight ADS
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