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Senior EM/IR Engineer
Saratoga, California, United States
$120k-$220k/yr OnsiteFull Time
8+ YOE8+ years EM/IR analysis for complex ASICs/SoCs; power integrity; PDN design and sign-off; Verilog/SystemVerilog/UVM; scripting (Python/Tcl); experience with Cadence Voltus and Synopsys RedHawk.
Cadence Voltus, Synopsys RedHawk, Verilog, SystemVerilog, UVM, VHDL, Tcl, Python
3mo
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CAD Engineer - Custom EMIR Methodology
Austin or Beaverton or San Diego or Sunnyvale
OnsiteFull Time
10+ YOEBS + 10 years in power/signal EM and/or IR analysis; Python, Perl, or C/C++; transistor level EM/IR analysis and automation.
Python, Perl, C/C++, EM/IR analysis tools
1mo
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Process Engineer II Senior
Santa Clara, California, United States
$100k-$137k/yr OnsiteFull Time
3+ YOEMS/PhD in materials science, chemistry, chemical engineering or related; 3+ years' semiconductor metrology/process development experience; expertise in AFM and IR characterization, DOE, cleanroom hands-on operation, data analysis, and strong communication.
AFM, Infrared (IR) spectroscopy, Design of Experiments (DOE)
1mo
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Staff Analog Layout Engineer
San Jose or Hsinchu
OnsiteFull Time
3+ YOESenior/Staff level IC layout engineer with 3-8+ years in deep-submicron analog/RF layouts; strong EDA/tool experience and EM/IR knowledge.
Cadence Virtuoso, Synopsys Custom Compiler, Mentor Calibre, Siemens ICV
3mo
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Senior Systems Engineer
Milpitas, California, United States
$128k-$192k/yr OnsiteFull Time
2+ YOEPhD in Engineering or Sciences (optical physics focus); 2-3 years in optical systems or hardware; 2-3 years in laser systems with mid-IR; experience with precision optics; Python/ Matlab proficiency; willing to travel up to 20%.
Python, Matlab
1mo
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ASIC Design Engineer
Santa Clara, California, United States
$116k-$190k/yr OnsiteFull Time
3+ YOEMS in Electrical or Computer Engineering (or equivalent), 3+ years experience, strong background in advanced submicron process issues, standard cell and custom ROM design, SPICE and DRC/LVS experience, EM/IR and variation simulations, and scripting (Perl, Tcl, Make).
SPICE, EM/IR, DRC/LVS, Perl, Tcl, Make, RTL
3w
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Principal Design Engineer
San Jose or Cary
$137k-$254k/yr OnsiteFull Time
1+ YOEBS/MS/PhD in Electrical Engineering with 7/5/1+ years respectively; experience with Cadence Innovus/Tempus/QRC/Voltus/Pegasus and Palladium/Protium; Linux and Shell/Perl/TCL scripting; RTL synthesis, floorplanning, timing closure, IR drop, and industry interfaces (PCIe, DDR, LPDDR, SRAM, UCIe).
Innovus, Tempus, QRC, Voltus, Pegasus, Palladium, Protium, Linux, Shell, Perl, TCL
5d
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PD Engineer
Santa Clara, California, United States
$107k-$161k/yr OnsiteFull Time
2+ YOE2+ years physical design experience with floorplanning, place-and-route, timing closure, ECOs, IR drop and physical/formal verification; scripting in Python, PERL, TCL; Linux/Unix shell; Bachelor's degree required.
Cadence Innovus, Synopsys Fusion Compiler, Synopsys PTSI, Python, PERL, TCL, Linux/Unix shell
1mo
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Physical IC Design Engineer
San Jose, California, United States
$144k-$230k/yr OnsiteFull Time
12+ YOE12+ years experience in full physical design cycle (RTL to tape-out). Bachelor’s in Electrical/Electronics Engineering, Tcl/Perl scripting, proficiency with EDA tools, timing closure, EM/IR analysis, and strong communication skills.
Tcl, Perl, EDA Tools
2mo
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Power Systems Design Engineer
San Jose, California, United States
OnsiteFull Time
8+ YOEBachelor’s in Electrical Engineering; 8+ years in power supply design for high-power processors; multi-phase power, 48V input conversion; PCB IR drop and power loss simulations; Cadence Voltus familiarity; willingness to apply even if not meeting every qualification.
Cadence Voltus IC Power Integrity Solution
1mo
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Senior DFX Power Methodology Engineer
Santa Clara, California, United States
$196k-$368k/yr OnsiteFull Time
6+ YOEEngineering degree or equivalent experience with 6+–12+ years in DFT/power; strong knowledge of DFT, VLSI power/timing/voltage noise; experience with power/thermal/IR drop analysis, post-silicon debug, AI/ML for EDA, and statistical data analysis.
Power Analysis, Thermal Analysis, IR Drop tools, Applied ML, Gen AI, statistical tools, RTL, STA, place-n-route, ATE, SLT
3w
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Senior Software Engineer - Static Analysis
San Jose, California, United States
RemoteFull Time
7+ YOE7+ years software engineering (4+ in static/program analysis or compiler infrastructure); deep knowledge of control/data-flow, call graph construction, inter-procedural and taint/reachability analysis; strong Java/Go/C++ skills; IR/bytecode/AST experience; technical ownership.
Java, Go, C++, LLVM, MLIR, SSA, IR, bytecode, ASTs, CI/CD
2w
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Physical Design Engineer
San Jose, California, United States
$150k-$250k/yr OnsiteFull Time
7+ YOE7+ years physical design experience (synthesis, PnR, STA, timing convergence, physical verification); Bachelor's in EE/CE/CS or equivalent experience; proficiency with Innovus, Tempus, Quantus, TCL; experience with EM/IR, PDN, LEC and sub-7nm/SoC design.
Innovus, Tempus, Quantus, TCL, Cadence, Synopsys
1mo
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Power Integrity Engineer-Silicon
San Jose, California, United States
OnsiteFull Time
7+ YOE10+ years PI experience with bachelor’s (or 7+ with advanced degree); deep power integrity expertise for 2.5D/3D packaging, PDN design, transient/EM/IR analysis, simulation tool proficiency, and cross-functional leadership.
Ansys SIwave, HFSS, Cadence Sigrity, Apache RedHawk, Voltus, Keysight ADS
1mo
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Senior Compiler Engineer, GPU Code Object Rewriting & Tooling
San Jose, California, United States
$179k-$306k/yr HybridFull Time
Expertise in GPU microarchitecture and performance modeling, strong C++ systems programming, compiler/IR experience, simulation and profiler validation, technical leadership, and preferred advanced degree in CS/CE/EE or equivalent experience.
C++, AMDGPU, GCN, RDNA, CDNA, ROCm, HIP, HSA, AMDGPU LLVM backend, ROCprof, ROCm Compute Profiler, Nsight Compute, LLVM, MLIR, GCC, LLVM MC, ELF, DWARF
1mo
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Staff Compiler Engineer - PyTorch + Kernel DSLPLATE
San Jose, California, United States
$163k-$253k/yr OnsiteFull Time
10+ YOEBS with 10+ yrs, MS with 8+ yrs, or PhD with 5+ yrs; experience in Triton/Helion/MLIR/XLA/TVM/Inductor/IREE/CUTLASS; kernel DSL/IR design; MLIR; PyTorch backends; kernel autotuning; HPC/NUMA; open-source contributions.
Triton, Helion, MLIR, XLA, TVM, Inductor, IREE, CUTLASS, PyTorch, LLVM/MLIR
1mo
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Senior Power Integrity (PI) Analysis Engineer
San Jose or Austin
$152k-$255k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE, 5+ years PI experience on advanced nodes (sub-7nm), expertise in IR-drop analysis, hierarchical multi-voltage PI, CPF/UPF, and strong scripting skills.
Cadence Voltus, Synopsys RedHawk-SC, Tcl, Python, Perl
1mo
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EDA Design Flow Development Engineer
Santa Clara or Folsom or Hillsboro or Austin
$142k-$269k/yr HybridFull Time
6+ YOEBachelor's in CE/EE/CS (or related) plus 6+ years (4+ with MS, 2+ with PhD). Experience with EM/IR reliability concepts, Redhawk/Totem, SPICE, parasitic extraction, transistor-level power integrity, and scripting/automation in Linux.
Redhawk, Totem, SPICE, Linux
1w
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Software Engineer - AI Agent Memory Infrastructure
San Jose, California, United States
OnsiteFull Time
Bachelor's in CS or related, strong distributed systems and IR/AI infrastructure experience, proficient in Go/Python/C++, familiarity with embeddings/RAG and memory systems.
Go, Python, C++, mem0, memOS, memU
2w
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Security Engineer II
Dublin, California, United States
$125k-$213k/yr HybridFull Time
7+ YOE7+ years information security experience (5+ with a large organization). Strong knowledge of endpoint, cloud, SIEM, EDR/XDR/MDR, log management, threat detection/response and automation. BLS: bachelor's degree preferred or senior certification; strong analytical, organizational and project estimation skills.
Anti-virus/malware protection, Advanced Threat Protection, Log Collection & Analysis, User Behavior Analytics, Vulnerabilities Management, SIEM, EDR, XDR, MDR, IR, File Integrity Monitoring, Endpoint Security, mobile security
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