7 noc engineer jobs at 3 companies in San Marcos, CA
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NoC Interconnect Design Engineer and Architect
San Diego, California, United States
$164k-$246k/yr OnsiteFull Time
6+ YOEBachelor's +6 / Master's +5 / PhD +4 years ASIC design experience; knowledge of AHB/AXI/CHI and NoC, ASIC flow (synthesis, STA, Lint), RTL/FPGA and post-silicon debug; strong architecture, performance/power analysis and communication skills.
AHB, AXI, CHI, RTL, FPGA, synthesis tools, STA, Lint, power tools
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NoC Interconnect Design Engineer and Architect
San Diego, California, United States
$116k-$173k/yr OnsiteFull Time
2+ YOEBachelor's degree +2 yrs (or Master's +1 yr or PhD) in Science/Engineering; experience with bus protocols (AHB, AXI, CHI), ASIC flow (synthesis, STA, Lint), RTL/FPGA and performance/power/area analysis.
AHB, AXI, CHI, NoC, RTL, FPGA, STA, Lint
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Mid Systems Engineer (RHEL/Automation) (w/ active Secret)
Norfolk or San Diego or Pearl Harbor
$85k-$110k/yr HybridFull Time
7+ YOEActive DoD Secret clearance, US citizenship, Bachelor's in engineering, IAT Level II/CompTIA Sec+, 7+ years experience, RHEL 8 and automation experience, ability to work independently and access NOC sites.
RHEL 8, RHEL 6, Ansible Automation, Satellite, AAP, Azure, VMware, Python, DOD STIG
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Next-Gen, High-Speed HBM, LPDDR Memory Subsystem ASIC Digital Design Engineer
San Diego, California, United States
$140k-$210k/yr OnsiteFull Time
4+ YOEBachelor's degree in engineering (or higher) plus multi-year ASIC/RTL design experience (4+ years with Bachelor's; 3+ with Master's; 2+ with PhD). Experience with high-speed memory subsystems (LPDDR, HBM), NoC, cache/SRAM controllers, and hardware architecture.
RTL, Synthesis, Timing Closure, Gate Level Simulations, Power Analysis
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Infra Systems Physical Architect
San Diego, California, United States
$140k-$210k/yr OnsiteFull Time
6+ YOEBachelor's +6 years (or Master's +5 or PhD +4) in Science/Engineering, 5+ years ASIC/NoC/physical architecture experience, expertise in physical design, timing, power, floorplanning, clocking, and scripting (Python, PERL, TCL).
NoC, System on Chip (SoC), DDR, AMBA Protocol, Design Compiler, Fusion Compiler, Genus, Primetime, Prime power, Innovus, TCL, Python, PERL, Linux/Unix shell, C
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Senior Engineer - Product Debug Team
San Diego, California, United States
$111k-$167k/yr OnsiteFull Time
2+ YOEBachelor's degree and 2+ years, master's degree and 1+ year, or PhD in a relevant field; 2+ years programming experience with C, C++, Java, or Python. Linux and embedded systems knowledge required.
Linux, JTAG, ETM, Trace32, GDB, oscilloscopes, C, C++, Java, Python, Assembly, Perl, Shell, ARM, Cortex, Hexagon, AHB, NoC, QNN
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SoC Interconnect Technology Team Lead
San Diego or Austin or Chandler
$243k-$314k/yr HybridFull Time
15+ YOE15+ years in SoC architecture/design with deep interconnect expertise, proven delivery of large-scale SoCs, leadership experience, and strong system-level performance and power optimization skills.
AMBA ACE, CHI, CCIX, CXL, AXI, NoC, DVFS