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Sr Packaging Engineer
Santa Clara, California, United States
$134k-$184k/yr OnsiteFull Time
Packaging engineering experience with supplier management, test plan development, Design For Transportability (DFT), standards development, continuous improvement, and ability to train others; travel ~10%.
2mo
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Packaging Design Engineer I
San Jose or Hayward or Texas
OnsiteFull Time
TransPak: Packaging solutions provider
2+ YOEBachelor’s in mechanical/manufacturing/industrial/packaging engineering; 2-3 years mechanical/structural design experience; CAD (SolidWorks/AutoCAD); GD&T knowledge; packaging design and testing experience; strong communication.
SolidWorks, AutoCAD, NX, BOM, 3D modeling, 2D drawings, GD&T
5d
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Principal Packaging Engineer, Optical Interfaces
Santa Clara, California, United States
$145k-$255k/yr OnsiteFull Time
10+ YOE10+ years packaging design experience for optical/photonic components, experience with PIC edge coupling, reliability engineering, CAD and FEA usage, and working with contract manufacturers.
CAD, FEA
1mo
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Staff Semi Packaging Engineer
San Jose, California, United States
$130k-$188k/yr OnsiteFull Time
3+ YOEMaster's in a relevant engineering field + ≥3 years industrial IC/package experience; expertise in analog IC package/module design, reliability and BOM selection, CAD modeling, and process development (FMEA, SPC, DOE); OSAT collaboration experience.
CAD
2mo
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Photonic Packaging Engineer, Principal
San Jose, California, United States
OnsiteFull Time
10+ YOEPh.D. or M.S. in EE, Physics, Materials Science, Mechanical Engineering, or related field; 10+ years in photonic packaging or related areas; strong expertise in high-speed packaging, thermal management, and optomechanical design.
1w
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Advanced Packaging Design Engineer
Santa Clara or Chandler
$192k-$287k/yr OnsiteFull Time
5+ YOEBS/MS/PhD in engineering,5-10 years advanced packaging design experience, expertise with Cadence APD, high-speed interfaces, substrate and assembly processes, and cross-functional collaboration.
Cadence APD, AutoCAD
3w
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Senior Fiber Optic Module Packaging Engineer
Sunnyvale, California, United States
$92k-$150k/yr OnsiteFull Time
2+ YOEBS/MS in telecom/optomechanical engineering, physics or related; minimum 2 years' related experience; SolidWorks and MS Office proficiency; experience with telecom fibers, materials selection, packaging design, testing, and manufacturing transfer.
SolidWorks, Word, Excel, Outlook, PowerPoint
2mo
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Software Engineer 6 - Ads Pricing & Packaging
Los Gatos or New York
$499k-$900k/yr OnsiteFull Time
10+ YOE10+ years software development experience (5+ years on inventory management); expertise in yield optimization, dynamic pricing, auction mechanics, rate card and packaging systems; API and data model design; technical leadership and strong communication.
VAST, OpenRTB
1mo
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ASIC Packaging Signal/Power Integrity Hardware Engineering Technical Lead (Remote)
San Jose or Research Triangle Park or Acton or Dallas or Tempe or Cary or Carlsbad or Colorado Springs
$184k-$264k/yr RemoteFull Time
3+ YOEBachelor's/MS/PhD in Electrical Engineering with 3+ to 8+ years SI/PI experience; expertise in high-speed design, SI/PI simulation, layout review, SPICE; mentoring and leadership experience.
Cadence Sigrity, Ansys HFSS, Keysight ADS, Cadence APD, Ansys EM, SPICE, Vector Network Analysis, IBIS
1mo
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Senior Signal Integrity Engineer – LPU Packaging
Santa Clara, California, United States
$168k-$311k/yr HybridFull Time
8+ YOEBS/MS/PhD in EE or equivalent, 8+ years in signal integrity/high-speed interconnects, SerDes/channel design, electromagnetics, simulation-to-measurement correlation using VNA/TDR/scope, and experience with industry SI tools.
Ansys HFSS, SIwave, Cadence Sigrity, ADS, HSPICE, IBIS-AMI, S-parameters, VNA, TDR, oscilloscope
1mo
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Staff Software Engineer, Pricing and Packaging Engineering
San Francisco or Denver or New York City or San Jose
$197k-$247k/yr HybridFull Time
8+ YOE8+ years building large-scale backend platform systems (commerce/billing/subscriptions preferred); strong distributed systems, API design, SLO, and mentorship experience; proven delivery of multi-quarter projects.
1mo
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Senior Package Design Engineer
San Jose or Taipei
$111k-$206k/yr HybridFull Time
5+ YOEMS in EE/CE, 5+ years packaging design/layout experience, proficiency with Cadence Allegro Package Designer (APD) and AutoCAD, experience with multiple package types and high-speed routing, knowledge of substrate technologies and JEDEC standards.
Cadence Allegro Package Designer (APD), AutoCAD
2w
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ASIC Package Design Manager
San Jose, California, United States
$144k-$230k/yr OnsiteFull Time
12+ YOE3+ MgmtManage and develop engineers for flip-chip-BGA package designs; requires 12+ years package design experience, 3+ years management, Ohio? (not stated), knowledge of SI/PI, project management and cross-functional collaboration.
1w
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Principal Package Design Engineer
San Jose, California, United States
$195k-$240k/yr HybridFull Time
5+ YOEMSc/PhD in engineering, 5+ years semiconductor packaging experience, expertise in advanced packaging architectures, reliability testing, thermal/mechanical/electrical analysis, OSAT collaboration, and project leadership.
Cadence Allegro Package Designer, Solid works, ANSYS, COMSOL, JMP, Minitab
1mo
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Sr. Engineer, Package Design
Santa Clara, California, United States
$139k-$191k/yr OnsiteFull Time
5+ YOEM.S. or PhD in Mechanical Engineering/Materials Science or related field; 5+ years semiconductor IC packaging experience; experience with OSATs, flip-chip/leadframe/substrate packages, thermal/stress/electrical modeling; AutoCAD experience.
AutoCAD
3w
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Advanced Package Design Engineer
San Jose, California, United States
OnsiteFull Time
10+ YOE10+ years experience in 2.5D/3D IC packaging, familiarity with packaging manufacturing flows, yield and reliability qualification, CAD/EDA flows, strong communication and cross-functional collaboration; BS in engineering required, MS/PhD preferred.
CAD, PDK, EDA
2mo
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Senior Technical Program Manager (Silicon)
San Jose, California, United States
OnsiteFull Time
10+ YOE10+ years in silicon design/tapeout, packaging, bring-up, validation; BS in EE/CE; strong PM skills.
MS Project, Jira, Asana, Smartsheet
1mo
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Staff Mechanical Engineer
Fremont or Salem
$185k-$240k/yr HybridFull Time
8+ YOE8+ years mechanical design experience, B.S./M.S. in Mechanical Engineering, experience with mechanism design, electronics packaging, FEA/thermal analysis, Creo, Windchill, Jira/Confluence; ability to mentor engineers.
Creo, Windchill, Jira, Confluence
1mo
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Staff Engineer Verification
San Jose, California, United States
$118k-$162k/yr HybridFull Time
1+ YOE1+ years in high-speed SI/PI and EMC, experience with PCB/package design, lab measurement and simulation, Python/Matlab for automation, strong communication and teamwork.
Ansys HFSS, Keysight ADS, VNA, TDR, spectrum analyzer, high-speed oscilloscope, Python, Matlab
2w
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Signal and Power Integrity Senior Application Engineer
San Jose, California, United States
$84k-$156k/yr OnsiteFull Time
1+ YOEBachelor's or Master's in Electrical/Electronics Engineering, 1+ years related experience, strong background in signal, power, and electromagnetics for package and PCB design, excellent communication and presentation skills.
Sigrity, Clarity, PCB Editor, ICP, Cadence Allegro
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