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160 principal designer jobs at 68 companies in Manteca, CA

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Principal Designer - Design Systems
San Jose, California, United States
$225k-$300k/yr HybridFull Time
eBay
eBayNASDAQ: EBAY: Global e-commerce leader connecting buyers and sellers worldwide.
12+ YOE12+ years leading design systems or platform design at scale, with exceptional product design craft, systems architecture expertise, accessibility knowledge, engineering partnership, leadership, and communication skills.
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Product Designer Project Intern (TikTok-Design-UX) - 2026 Start (BS/MS)
San Jose, California, United States
OnsiteInternship
TikTok
TikTok: Short-form mobile video and social media platform.
Pursuing BS/MS in design/HCI/interaction design/visual communication, available for ≥5 months, portfolio required, proficiency in Figma, strong communication and collaboration skills.
Figma, Principle, Adobe Creative Suite
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2mo
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Principal RF MMIC Designer (Richardson, TX, US, 75080)
Richardson or Dallas or San Jose or Boston
$148k-$193k/yr OnsiteFull Time
Qorvo
QorvoNASDAQ: QRVO: Supplies semiconductor solutions for connectivity and power.
7+ YOEAdvanced MMIC design experience with III-V technologies (GaN, GaAs), EM and nonlinear simulation proficiency (ADS, HFSS, Microwave Office, Cadence, SONNET, Axiem, Momentum), and 7+ years experience (PhD) up to 12+ years (BS).
ADS, Microwave Office (MWO), SONNET, Axiem, Momentum, HFSS, Cadence
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Mechanical Principal
San Francisco or Walnut Creek
$160k-$200k/yr OnsiteFull Time
EXP
EXP: Global firm providing engineering, architecture, design, and consulting services.
15+ YOEBachelor's degree in HVAC or mechanical engineering, 15+ years of building HVAC and piping design experience, project management, multidisciplinary leadership, Revit MEP proficiency, and advanced mechanical systems expertise.
Revit MEP, HVAC, MEP, FP, RFP, RFQ, UPS, HEPA, DX, QA/QC, CHW, HW, WSHP
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Principal Design Engineer
San Jose, California, United States
$176k-$298k/yr OnsiteFull Time
Micron Technology
Micron TechnologyNASDAQ: MU: Global leader in memory and storage semiconductor solutions.
8+ YOE8+ years IC design experience, hands-on AI/LLM tool use, expertise in high-speed IO and physical/layout flows, ability to redesign workflows for AI, strong mentorship and technical leadership.
LLM-based assistants, RTL, BSIM, DDR4, DDR5, LPDDR5, LPDDR6, HBM3, HBM3E, HBM4, retrieval-augmented generation (RAG), EDA
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Principal Engineer - Digital ASIC Design
San Jose, California, United States
$70k-$163k/yr OnsiteFull Time
Microchip Technology
Microchip TechnologyNASDAQ: MCHP: A leading provider of smart, connected, and secure embedded control solutions.
10+ YOE10+ years ASIC/FPGA digital design; SystemVerilog; Cadence/Synopsys front-end; PHY/Serdes knowledge; post-silicon validation; travel up to 25%.
System Verilog, Cadence Tools, Synopsys Tools, VCS, SpyGlass, Design Compiler, PrimeTime, Lab equipment
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Principal Engineer - AI Engineering
Concord or Charlotte or San Francisco
$159k-$305k/yr OnsiteFull Time
Wells Fargo
Wells FargoNYSE: WFC: Multinational financial services providing banking and investment products.
7+ YOERequires 7+ years engineering experience, 5+ years programming, infrastructure as code, cloud, and automation experience, plus 2+ years designing AI, generative AI, or agentic automation solutions.
GCP Vertex AI, Azure Machine Learning, Kubernetes, OpenShift Container Platform (OCP), Google Kubernetes Engine (GKE), Python, Java, Shell scripting, Terraform, Crossplane, Ansible, Harness CD, GitHub Actions, Playwright, Model Development Lifecycle (MDLC), MLOps, Generative AI, Retrieval-Augmented Generation (RAG), Large Language Models, vector databases, prompt engineering, Model Context Protocol (MCP), LangGraph, CrewAI, Microsoft AutoGen, LangChain, Chainlit, SQL, TensorFlow, PyTorch
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Principal Electrical Design Engineer
Fremont, California, United States
$114k-$196k/yr OnsiteFull Time
Coherent Corp.
Coherent Corp.NYSE: COHR: Developer and manufacturer of lasers, engineered materials, and networking components.
7+ YOEBachelor’s degree with 12+ years in optical transceiver electrical design; or Master’s with 10 years; PhD with 7 years; on-site, strong SI/PI and high-speed design experience.
PCB design, SPICE, signal integrity, power integrity, EMI, high-speed signaling
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Sr Principal Design Engineer
San Jose, California, United States
$154k-$286k/yr OnsiteFull Time
Cadence Design Systems
Cadence Design SystemsNASDAQ: CDNS: Computational software provider for electronic design and system development.
5+ YOEPhD EE with 5+ years or MS EE with 7+ years of mixed-signal design experience; strong knowledge of mixed-signal design, verification, Cadence flows, and communication skills.
Cadence, MATLAB, C, SystemVerilog, VerilogA, Perl, Python
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Principal Applications Engineer
Austin or San Jose or San Diego
OnsiteFull Time
NXP Semiconductors
NXP SemiconductorsNASDAQ: NXPI: Global manufacturer of high-performance mixed-signal semiconductor solutions.
12+ YOEBachelor's degree in Electrical/Electronic Engineering; 12+ years hardware design or applications engineering; experience with high-speed SerDes, Ethernet, PCIe, DP/USB; strong SI/PI; hands-on lab skills.
Oscilloscopes, TDR, VNA, BERT, Protocol Analyzers, Logic Analyzers, S-parameter analysis, Eye/Jitter simulations
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Senior Associate Principal Engineer
Union City, California, United States
$155k-$175k/yr OnsiteFull Time
Southland Industries
Southland Industries: Mechanical, electrical, and plumbing engineering and construction firm.
10+ YOEPE license required, Bachelor's in Mechanical Engineering, ~10+ years mechanical design/construction experience, HVAC/plumbing system design knowledge, Revit/CADD/Microsoft Excel skills, strong communication and public speaking.
Revit, CADD, Microsoft Excel
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Principal Engineer – Oxide Semiconductor Materials
San Jose, California, United States
$158k-$210k/yr OnsiteFull Time
Western Digital
Western DigitalNASDAQ: WDC: Building storage infrastructure for the AI-driven data economy.
Ph.D. in materials science, physics, electrical engineering, or related field; expertise in oxide semiconductors or related devices; hands-on UHV deposition and film characterization experience; nanofabrication and device design knowledge.
Ultra-High Vacuum (UHV), XRD, XPS, XRF, Raman spectroscopy, magnetometry, AFM
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Principal System Architect - Instrument
Fremont, California, United States
$206k-$258k/yr OnsiteFull Time
Cytek Biosciences
Cytek BiosciencesThe Nasdaq Global Select Market: CTKB: Public biotechnology making flow cytometry instruments, reagents, software, and services for cancer and cell-biology researchers.
8+ YOELead architecture for flow cytometry instruments; 8+ years in analytical instrumentation; cross‑functional leadership; experience with Class I–III devices and design controls.
CFD, MATLAB, Python, Flow cytometry, Reliability engineering methods, FMEA
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Senior Principal Engineer- SoC/Chip Lead
San Jose, California, United States
$230k-$300k/yr HybridFull Time
Renesas Electronics
Renesas ElectronicsTokyo Stock Exchange: 6723: Global provider of embedded semiconductor and system solutions.
20+ YOE20+ years semiconductor experience; proven SoC/chip lead ownership across architecture, integration, and silicon; expertise in RTL, verification, physical design, DFT, STA, low-power, and silicon bring-up; strong leadership and communication.
UALink, Ethernet
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Senior Principal, Design Engineering, Power Design
San Jose, California, United States
$182k-$319k/yr OnsiteFull Time
Celestica
CelesticaNYSE: CLS: Electronics manufacturing and supply chain solutions provider.
10+ YOE10+ years industry experience with 5+ years in power supply design; expertise in high-power, low-noise, high-density board-level power, DC-DC conversion, component selection, simulation and test; Bachelor’s in EE (Master’s preferred).
Spice, LTspice, TI WorkBench, Cadence Allegro, DxDesigner
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Sr. Principal SoC Architect (AI2501)
San Jose, California, United States
$231k-$358k/yr OnsiteFull Time
SiMa.ai
SiMa.ai: Private semiconductor and software developing MLSoC platforms for edge Physical AI in robotics, automotive, industrial, and healthcare.
20+ YOEMS or PhD in EE/CS, 20+ years developing hardware-focused products, 3+ years architecting and tape-out of complex ML SoCs, strong ML/math foundation, HW/SW co-design and industry/publication experience.
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Photonic Packaging Engineer, Principal
San Jose, California, United States
OnsiteFull Time
Astera Labs
Astera LabsNASDAQ: ALAB: Provider of connectivity solutions for AI data centers.
10+ YOEPh.D. or M.S. in EE, Physics, Materials Science, Mechanical Engineering, or related field; 10+ years in photonic packaging or related areas; strong expertise in high-speed packaging, thermal management, and optomechanical design.
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Principal Engineer, ASIC Design Verification
San Jose, California, United States
$190k-$240k/yr OnsiteFull Time
Ayar Labs
Ayar Labs: -packaged optics providing connectivity for hyperscale AI infrastructure.
12+ YOEMS in Electrical or Computer Engineering; 12+ years ASIC/SoC verification experience; SystemVerilog and UVM expert; verification environment design; scripting for automation.
SystemVerilog, UVM, Scripting (Python, Perl, Tcl, Shell)
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2mo
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Sr. Principal Software Engineer (Prisma SASE)
San Francisco or Santa Clara or San Jose
$170k-$277k/yr OnsiteFull Time
Palo Alto Networks
Palo Alto NetworksNASDAQ: PANW: Global cybersecurity platform providing network, cloud, and AI-driven security solutions.
10+ YOEBS (CS) +12 yrs or MS +10 yrs in system software; experience with data plane/control plane, C and DPDK; strong system design, networking, and debugging skills.
C, DPDK, Python, Go, Linux
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Principal Engineer, GPU Design Verification (Subsystems)
San Jose or Austin
$222k-$365k/yr OnsiteFull Time
Samsung Electronics
Samsung ElectronicsKorea Exchange: 005930: Global leader in technology, semiconductors, and consumer electronics.
10+ YOE15+ years exp; 10+ years in GPU/semiconductor verification; strong C/C++, Python/Perl; SystemVerilog/UVM; testbench design; multiple subsystem verification; excellent debugging and collaboration.
SystemVerilog, UVM, C++, Python, Perl
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