Killingly Center • 50 milesRemote · Hybrid · Onsite · Field · All Environments
Killingly Center • 50 milesRemote · Hybrid · Onsite · Field · All Environments
Killingly Center • 50 milesRemote · Hybrid · Onsite · Field · All Environments
Killingly Center • 50 milesRemote · Hybrid · Onsite · Field · All Environments
12 rtl engineer jobs at 6 companies in Killingly Center, CT
1mo
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Interconnect Micro-architect/RTL Design Engineer
Austin or Boxborough
$156k-$268k/yr HybridFull Time
Experienced RTL design engineer with strong Verilog/System Verilog skills, knowledge of C/C++ and scripting (Perl or Python), digital/high-speed design understanding, and experience with multi-processor coherency, DFT-friendly RTL and post-silicon debug.
Verilog, System Verilog, C, C++, Perl, Python, x86, ARM
1mo
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Senior RTL Design Engineer – DDR/LPDDR Memory Controller
Austin or Boxborough or Vancouver
HybridFull Time
Experience in digital design, Verilog/SystemVerilog, scripting (Python/Perl/Tcl), EDA tool flows, and DDR/LPDDR memory systems; bachelor’s or master’s in related field and strong communication and problem-solving skills.
Verilog, SystemVerilog, Python, Perl, Tcl, EDA tools
2w
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Electrical Engineer
Marlborough, Massachusetts, United States
$75k-$99k/yr OnsiteFull Time
1+ YOEBS/MS in Electrical or Computer Engineering,1-4 years EE experience,schematic design and FPGA RTL with Verilog,OrCAD proficiency,technical writing and strong communication skills.
OrCAD, Verilog, ModelSim, Quartus, Git, SVN, oscilloscope, logic analyzer, frequency generator
1w
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Senior FPGA Engineer
Norwood, Massachusetts, United States
OnsiteFull Time
7+ YOE7+ years FPGA/RTL experience, proficiency with RTL design and simulation, Verilog/SystemVerilog, Modelsim/VCS/Xcelium; BS/MS/PhD required; experience with AMD/Altera toolchains preferred.
Modelsim, VCS, Xcelium, Python, C/C++, Verilog, System Verilog
2mo
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Modem HW Design Verification Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$128k-$192k/yr OnsiteFull Time
1+ YOEDegree in computer/electrical engineering or related field (BS/MS/PhD) with 1+ years (MS) or 2+ years (BS) engineering experience. Experience in verification planning, SystemVerilog/UVM, RTL languages, C/C++, Python/Perl, Unix/Linux scripting, and GenAI/ML-assisted verification preferred.
SystemVerilog, UVM, OVM, Verilog, VHDL, C, C++, SystemC, Python, Perl, Unix/Linux shell scripting, Makefiles, XML, RTL
1w
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Electrical Design Engineer
Marlborough, Massachusetts, United States
$75k-$99k/yr OnsiteFull Time
1+ YOEBS or MS in Electrical/Computer Engineering, 1+ years electrical engineering experience, schematic design and FPGA/RTL with Verilog, proficiency with OrCAD and lab bring-up tools, strong communication and technical writing.
OrCAD, FPGA, Verilog, ModelSim, Quartus, I2C, SPI, QSPI, Ethernet, oscilloscopes, logic analyzers, frequency generators, Git, SVN
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Sr. FPGA Engineer
Marlborough, Massachusetts, United States
OnsiteFull Time
5+ YOEBachelor's in Engineering required (Master's preferred), 5+ years FPGA RTL experience with Verilog/SystemVerilog, 3+ years software development (C/C++/C#/Python), experience with QuestaSim, Vivado, Quartus, Git/CI-CD, ARM/Linux integration; MATLAB/DSP desirable.
Verilog, SystemVerilog, C, C++, C#, Python, QuestaSim, Vivado, Quartus, MATLAB, ARM, Linux, Git, CI/CD
3mo
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Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$104k-$192k/yr OnsiteFull Time
1+ YOEBachelor's in engineering or related; 1+ year industry/programming experience; RTL/Verilog/System Verilog and modem development experience; familiarity with synthesis, verification, Unix/Linux shell scripting, Python/Perl.
C, C++, Python, Verilog, System Verilog, Unix/Linux shell scripting, Perl, Makefiles, XML
2w
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Senior Staff Engineer, Design Verification
Westborough, Massachusetts, United States
$151k-$223k/yr OnsiteFull Time
3+ YOEBachelor's with 5+ years or Master's/PhD with 3+ years in digital design/verification; expertise in UVM, constrained-random verification, SVA, RTL debug; C/C++ and scripting (Python/Perl); Linux experience.
UVM, SystemVerilog, SystemVerilog Assertions (SVA), C, C++, Python, Perl, Linux
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Firmware Memory Engineer
Austin or Boxborough
$156k-$268k/yr HybridFull Time
Design and develop pre/post-silicon firmware for high-speed LPDDR/DDR and inter-chip IO PHYs; post-silicon firmware on real hardware required; strong C/C++, scripting (Python), Verilog/SystemVerilog, lab instrumentation and debugging skills; bachelor's in EE/CE preferred.
C, C++, Python, Verilog, SystemVerilog, RTL, ATE, SERDES, DDR, LPDDR, oscilloscope, logic analyzer
2mo
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Senior Staff Engineer, Digital IC Design
Westborough, Massachusetts, United States
$151k-$223k/yr OnsiteFull Time
5+ YOEBachelor's in CS/EE (or advanced degree) with 5+ years' related experience; strong micro-architecture, RTL coding and functional verification skills; proficient in Verilog/VHDL; Perl/Python/Tcl a plus; strong teamwork and problem-solving.
Verilog, VHDL, Perl, Python, Tcl, EDA tools
5d
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Silicon IP Program Manager
Sunnyvale or Austin or Boxborough or Oregon
$189k-$283k/yr OnsiteFull Time
10+ YOEBachelor's degree in electrical engineering or equivalent, 10+ years in semiconductors, technical program management, SoC/IP development, customer programs, semiconductor design flows, and cross-functional leadership.
RTL, SoC