3mo
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RTL Design Engineer
Waltham, Massachusetts, United States
OnsiteFull Time
Bachelor's in Electrical Engineering; RTL design experience; Verilog/SystemVerilog; front-end tools; mixed-signal and analog concepts; scripting (Perl, JSON, Python); GenAI tooling for RTL design.
Verilog, SystemVerilog, Verilog simulators, UPF, Python, Perl, JSON
1mo
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Interconnect Micro-architect/RTL Design Engineer
Austin or Boxborough
$156k-$268k/yr HybridFull Time
Experienced RTL design engineer with strong Verilog/System Verilog skills, knowledge of C/C++ and scripting (Perl or Python), digital/high-speed design understanding, and experience with multi-processor coherency, DFT-friendly RTL and post-silicon debug.
Verilog, System Verilog, C, C++, Perl, Python, x86, ARM
3mo
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Senior Staff RTL Design Engineer- 16908
Boxborough, Massachusetts, United States
$138k-$208k/yr OnsiteFull Time
10+ YOE10+ years ASIC digital design experience with production RTL ownership, Verilog and Perl proficiency, knowledge of synthesis, timing analysis, and power optimization; Bachelor's degree in EE/CE or related field required.
Verilog, Perl
2w
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Principal PCIe Subsystem RTL lead
San Jose or Santa Clara or Austin or Seattle or Boston
HybridFull Time
10+ YOE10+ years digital IC design experience with 4+ years PCIe subsystem design/integration, strong SystemVerilog RTL skills, experience integrating PCIe controller/SerDes PHY, multi-clock-domain design, and ability to lead architectural work.
SystemVerilog, UVM, PCIe, CXL, SerDes
2w
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Interconnect Design Engineer
Santa Clara or Cambridge or Austin or Boston
$206k-$251k/yr OnsiteFull Time
Expertise in interconnect, cache/coherency and RTL generator design; strong software engineering and hardware RTL skills; BS/MS in EE/CE/CS or equivalent experience.
Chisel, Scala, FIRRTL, Verilog, System Verilog, VHDL, Bluespec, Git, Github, Jira, Confluence, TileLink, RISC-V, AXI, AHB, APB, CHI
1mo
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FPGA Engineer
Boston, Massachusetts, United States
OnsiteFull Time
RTL proficiency (Verilog or VHDL), real industry FPGA deployment experience, familiarity with major FPGA platforms (Xilinx/AMD, Lattice, Intel/Altera), embedded C/C++ experience, and experience with prototype bring-up and ASIC verification workflows.
Verilog, VHDL, C, C++, RTL, FPGA, Xilinx, AMD, Lattice, Intel/Altera, ASIC, ADC, DAC
2mo
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Distinguished Engineer, ASIC (CONTRACT)
Burlington or New York or San Francisco
HybridContract, Temporary
8+ YOE8–12+ years in digital IC/ASIC/SoC design; strong RTL SystemVerilog; tapeout experience; cross-functional collaboration.
SystemVerilog, Verilog, RTL, ASIC, SoC, clock_domain, PPA tools
3w
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Physical Design Engineer
Beaver Brook or Phoenix
$122k-$200k/yr OnsiteFull Time
2+ YOEExperience implementing physical design flows for custom IP/SoC, proficiency with EDA tools, RTL/GDS knowledge, scripting (TCL), and 2+ years of relevant experience with a relevant degree.
industry-standard EDA tools, TCL, RTL, GDS
2mo
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FPGA Engineer (MA, Boston)
Boston, Massachusetts, United States
OnsiteFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Experience with RTL, HDL, C/C++, Python; VHDL/Verilog; hardware security; IP core development; FPGA toolchains; Xilinx/Intel devices; simulation and verification; system integration; embedded software testing; cryptography; cocotb/pyuvm.
RTL, VHDL, Verilog, Python, C, C++, Tcl, Vivado, GHDL, Questa, Quartus Prime, Zynq, Versal, Stratix, Agilex, AXI, ACE, Avalon, IP core, Xilinx, FPGA verification tools, cocotb, pyuvm
4d
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Electrical Engineer
Marlborough, Massachusetts, United States
$75k-$99k/yr OnsiteFull Time
1+ YOEBS/MS in Electrical or Computer Engineering,1-4 years EE experience,schematic design and FPGA RTL with Verilog,OrCAD proficiency,technical writing and strong communication skills.
OrCAD, Verilog, ModelSim, Quartus, Git, SVN, oscilloscope, logic analyzer, frequency generator
2mo
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Principal Firmware/FPGA Engineer (Onsite)
Cambridge, Massachusetts, United States
$108k-$205k/yr OnsiteFull Time
8+ YOE8+ years in STEM or an advanced degree with 5+ years; FPGA RTL/Verilog/VHDL; DSP fundamentals; high-speed interfaces; scripting; ability to obtain security clearance
Verilog, VHDL, RTL, FPGA, C++, Python, bash, Tcl, Ethernet, sFPDP, HBM2, DDR, Linux, Petalinux
2mo
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Senior Digital Engineer
Sydney or Sydney or Irvine or Boston or Bangalore or Cambridge or Hangzhou or Taipei or Tokyo or Sydney
OnsiteFull Time
5+ YOE5+ years as Senior Digital Engineer; strong Verilog/SystemVerilog; RTL design; low-power techniques; collaborate with firmware/PHY teams.
Verilog/SystemVerilog, C, Python, Tcl, Shell, Makefiles, UPF/CPF, Scripting and automation
2d
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Senior FPGA Engineer
Norwood, Massachusetts, United States
OnsiteFull Time
7+ YOE7+ years FPGA/RTL experience, proficiency with RTL design and simulation, Verilog/SystemVerilog, Modelsim/VCS/Xcelium; BS/MS/PhD required; experience with AMD/Altera toolchains preferred.
Modelsim, VCS, Xcelium, Python, C/C++, Verilog, System Verilog
1d
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Electrical Design Engineer
Marlborough, Massachusetts, United States
$75k-$99k/yr OnsiteFull Time
1+ YOEBS or MS in Electrical/Computer Engineering, 1+ years electrical engineering experience, schematic design and FPGA/RTL with Verilog, proficiency with OrCAD and lab bring-up tools, strong communication and technical writing.
OrCAD, FPGA, Verilog, ModelSim, Quartus, I2C, SPI, QSPI, Ethernet, oscilloscopes, logic analyzers, frequency generators, Git, SVN
2mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in Electrical or Computer Engineering; 5+ years hardware verification with SystemVerilog/UVM; RTL verification; strong SystemVerilog/UVM; experience with industry EDA tools; US citizenship and active Secret clearance; willingness to travel up to 10%
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, Python, TCL
2mo
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Principal Audio/DSP Systems Engineer
Boston, Massachusetts, United States
$200k-$275k/yr OnsiteFull Time
10+ YOEPhD in Electrical Engineering or related field; 10+ years in audio/signal processing; deployment on DSP/NPU; fixed-point, PTQ/QAT; C/Python/MATLAB; RTL verification; embedded AI inference.
C, Python, MATLAB, TensorFlow/TFLite, PyTorch/ONNX, DSP, RTL verification, SIMD, NPU, Fixed-point programming, Model quantization, Beamforming
1mo
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Principal FPGA Engineer
Ashburn or Boston or Nashua or Tewksbury
$144k-$192k/yr OnsiteFull Time
10+ YOEBachelor's in EE/CE, 10+ years FPGA hardware development, strong RTL skills (SystemVerilog/Verilog/VHDL), FPGA toolflow experience, lab test/debug proficiency, mentorship/leadership experience, US citizenship required; active security clearance preferred.
ModelSim, Questa, Xilinx ISE, Vivado, Vivado IP Integrator, SystemVerilog, Verilog, VHDL, Zynq MPSoC, Versal Adaptive SoC, UltraScale+, Microchip Libero SoC, Intel Quartus, ChipScope, TCL, oscilloscopes, logic analyzers
1w
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Senior Staff Engineer, Design Verification
Westborough, Massachusetts, United States
$151k-$223k/yr OnsiteFull Time
3+ YOEBachelor's with 5+ years or Master's/PhD with 3+ years in digital design/verification; expertise in UVM, constrained-random verification, SVA, RTL debug; C/C++ and scripting (Python/Perl); Linux experience.
UVM, SystemVerilog, SystemVerilog Assertions (SVA), C, C++, Python, Perl, Linux
3mo
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Software Engineer II (Full Stack, Platform)
Boston, Massachusetts, United States
$125k-$175k/yr OnsiteFull Time
3+ YOE2–4 years experience; JS/TypeScript, React, Node.js; REST APIs; i18n, RTL; UI components; CI/CD; collaboration.
JavaScript, TypeScript, React, Node.js, REST APIs, PostgreSQL, MySQL, CircleCI, GitHub Actions, Figma, CSS, WCAG, Storybook, i18n, RTL, BiDi
2w
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Senior Electrical Engineer — Compute and Sensing
Cambridge, Massachusetts, United States
$213k-$284k/yr OnsiteFull Time
7+ YOE7+ years delivering complex electronics to production; strong PCB, power, high-speed signal design, camera/sensor integration, FPGA familiarity, lab instrumentation and cross-functional collaboration skills.
Altium, MIPI CSI-2, PCIe, Ethernet, DDR, SerDes, FPGA, RTL, HDL, Oscilloscope, Logic Analyzer, Protocol Analyzer
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