10 rtl engineer jobs at 3 companies in Rocky Mount, NC
2mo
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RISCV CPU System RTL Engineer
Santa Clara or San Diego or Austin or Raleigh
$142k-$213k/yr OnsiteFull Time
1+ YOEMaster's (1+ yr) or Bachelor's (2+ yrs) in EE/CE/CS; 1–3 years CPU RTL experience; deep microarchitecture knowledge; proficiency in Verilog/VHDL; experience with power management, debug/trace, and strong documentation and communication skills.
Verilog, VHDL, Perl, Python
5d
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Principal Subsystem Engineer (Design or DV)
Mountain View or Redmond or Raleigh
$143k-$275k/yr HybridFull Time
8+ YOEBachelor's degree or equivalent experience with 8+ years engineering experience; expertise in digital RTL design or DV, RTL debugging, verification methodology, and cross-team leadership; ability to pass Microsoft cloud background checks.
Verilog, System Verilog, Universal Verification Methodology (UVM), C++, Python, Perl
1w
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Senior Physical Design Engineer
Hillsboro or Redmond or Mountain View or Raleigh or Austin
$120k-$235k/yr HybridFull Time
5+ YOEExperience in SOC physical design, low-power methodology, RTL-to-GDS implementation, signoff (timing, physical verification, EMIR, formal equivalence), and collaboration across CAD, RTL, architecture, and power teams.
PrimePower
1w
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Senior Silicon Engineer
Redmond or Austin or Raleigh or Hillsboro
$120k-$235k/yr HybridFull Time
1+ YOEDegree in EE/CE/CS or equivalent with 1–5+ years technical engineering experience depending on degree; expertise in RTL, synthesis, STA, PD flows; proficiency in Tcl and Python; ability to pass Microsoft cloud background and export-control screenings.
PrimeTime, Genus, DC, Innovus, ICC2, Tcl, Python
3w
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Principal Firmware Engineer
Mountain View or Redmond or Hillsboro or Raleigh or Austin
$143k-$275k/yr HybridFull Time
SoC/firmware architecting, silicon bring-up, root-cause debug across RTL and firmware; doctoral/masters/bachelors in EE/CE/CS or equivalent experience; ability to pass Microsoft Cloud Background Check.
JTAG, ARMDS, Lauterbach TRACE32, ATE, Linux, Windows, Microsoft Excel
3d
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Senior Security IP Engineer
Mountain View or Hillsboro or Austin or Redmond or Raleigh
$120k-$235k/yr HybridFull Time
1+ YOEDegree in EE/CE/CS plus multiple years hardware design experience; expertise in RTL, CDC/RDC/LINT/STA, cryptographic hardware, and silicon bring-up; proficiency in Verilog/SystemVerilog and scripting.
Verilog, System Verilog, Python, Perl, AMBA AXI
5d
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Principal Subsystem Design Manager
Mountain View or Raleigh
$143k-$275k/yr HybridFull Time
8+ YOEAdvanced degree or equivalent experience in EE/CE/CS with 6–8+ years engineering experience, expertise in digital logic, RTL/Verilog/SystemVerilog, synthesis and PPA, post-silicon debug, and leadership; ability to pass security and export-control screenings.
Verilog, SystemVerilog, Python, Perl
1w
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Hardware Designer
Raleigh or United States
RemoteFull Time
5+ YOE5+ years electronics design experience, Bachelor's in Electrical/Computer Engineering or equivalent, strong high-speed circuit and PCB design skills, FPGA familiarity, prototype bring-up and lab verification experience.
LTSpice, OrCAD Capture CIS, Cadence CIS, Cadence Allegro, Verilog, RTL, HLS, optical test sets, signal analyzers, GHz+ oscilloscopes, VNAs, signal generators
1w
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Director, Design Verification
Mountain View or Redmond or Raleigh
$143k-$275k/yr HybridFull Time
3+ YOE3+ MgmtAdvanced degree or equivalent with multi-year design verification experience; experience in UVM and RTL debugging; people leadership; eligibility for export-controlled information and Microsoft background checks.
Universal Verification Methodology (UVM), C++, Python, Perl
2mo
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CPU Power and Thermal Management Architect
Santa Clara or San Diego or Austin or Raleigh
$199k-$298k/yr OnsiteFull Time
6+ YOEAdvanced CPU/SoC architecture expertise (boot, idle/active power, DVFS, thermal and limit management), strong SW/FW collaboration, excellent documentation and communication. Advanced degree preferred with significant industry experience.
RTL, APCI, PSCI