27 rtl engineer jobs at 9 companies in Roxboro, NC
3mo
Save
Mark Applied
Hide
RISCV CPU System RTL Engineer
Santa Clara or San Diego or Austin or Raleigh
$142k-$213k/yr OnsiteFull Time
1+ YOEMaster's (1+ yr) or Bachelor's (2+ yrs) in EE/CE/CS; 1–3 years CPU RTL experience; deep microarchitecture knowledge; proficiency in Verilog/VHDL; experience with power management, debug/trace, and strong documentation and communication skills.
Verilog, VHDL, Perl, Python
2d
Save
Mark Applied
Hide
Principal Verification Engineer
Mountain View or Redmond or Hillsboro or Austin or Raleigh
$143k-$275k/yr HybridFull Time
3+ YOERequires a degree in electrical engineering, computer engineering, computer science, or related field and 3–8+ years of technical engineering experience depending on degree; verification, UVM, RTL, simulation, scripting, and security screening required.
Universal Verification Methodology (UVM), C, Zsh, Bash, Python, Perl, Verilog, Microsoft Azure, AXI, AMBA
1mo
Save
Mark Applied
Hide
Principal Design Engineer
San Jose or Cary
$137k-$254k/yr OnsiteFull Time
1+ YOEBS/MS/PhD in Electrical Engineering with 7/5/1+ years respectively; experience with Cadence Innovus/Tempus/QRC/Voltus/Pegasus and Palladium/Protium; Linux and Shell/Perl/TCL scripting; RTL synthesis, floorplanning, timing closure, IR drop, and industry interfaces (PCIe, DDR, LPDDR, SRAM, UCIe).
Innovus, Tempus, QRC, Voltus, Pegasus, Palladium, Protium, Linux, Shell, Perl, TCL
2mo
Save
Mark Applied
Hide
Senior Staff Engineer, Digital IC Design
Morrisville, North Carolina, United States
$136k-$201k/yr OnsiteFull Time
3+ YOEBachelor’s in CS/EE (5+ years) or MS/PhD (3+ years); strong SystemVerilog RTL, SoC and multi-clock design, RTL/synthesis/timing/verification expertise, SVA/formal knowledge; Python/Perl/Tcl/UNIX shell desirable; strong communication and documentation.
SystemVerilog, SVA, AXI, DDR, Ethernet, PCIe, Python, Perl, Tcl, UNIX shell
3w
Save
Mark Applied
Hide
Staff FPGA Systems Development Engineer
Durham or Wilmington
$125k-$181k/yr OnsiteFull Time
Bachelor's in electrical/computer engineering, strong FPGA/SoC and RTL experience, familiarity with Intel/Altera or AMD-Xilinx, proficiency in C/C++, Python, TCL, strong communication and coordination skills.
Intel-Altera, AMD-Xilinx, C, C++, Python, TCL, Electronic Test Equipment
1mo
Save
Mark Applied
Hide
Senior Physical Design and Timing Engineer
Santa Clara or Austin or Hillsboro or Durham
$136k-$265k/yr HybridFull Time
3+ YOEBS in Electrical or Computer Engineering with 5+ years or MS with 3+ years; strong static timing analysis, synthesis, physical design, timing convergence, RTL/logic understanding; proficiency with Perl, Tcl, Make, Python.
Perl, Tcl, Make, Python
1mo
Save
Mark Applied
Hide
Senior ASIC Design Engineer - Agentic AI
Santa Clara or Durham or Austin
$168k-$311k/yr OnsiteFull Time
8+ YOEMaster's/PhD or equivalent, 8+ years experience, expertise in micro-architecture and RTL (Verilog), ASIC design flow, Python proficiency, and experience with LLM fine-tuning, RAG pipelines and vector databases.
Verilog, Python, large language models, RAG pipelines, vector databases
2mo
Save
Mark Applied
Hide
MTS Digital Engineering
Morrisville, North Carolina, United States
$58k-$108k/yr HybridFull Time
0+ YOEBS EE (2-3 years) or MS EE/CE (0-1 year). Strong digital RTL design experience with Verilog/SystemVerilog, STA/CDC/Lint/DFT/BIST tools, plus Python/Perl scripting and simulation/debug skills.
SystemVerilog, Verilog, Python, Perl, Static Timing Analysis (STA), LEC, CDC, RDC, Lint, DFT, BIST
1mo
Save
Mark Applied
Hide
Senior ASIC Physical Design Engineering Technical Lead
San Jose or Austin or Research Triangle Park
$211k-$305k/yr HybridFull Time
5+ YOEAdvanced degree in Electrical Engineering with significant physical design experience (BSc+12y / MSc+8y / PhD+5y), RTL-to-GDSII/tapeout experience at 7nm/5nm/3nm, EDA tool proficiency, UPF low-power methods, Python and AI tools experience.
Innovus, Tempus/Primetime, Redhawk/Voltus, Calibre/Pegasus, UPF, Python, RTL2GDSII, Flex-HTree, AI tools
3w
Save
Mark Applied
Hide
Hardware Designer
Raleigh or United States
RemoteFull Time
5+ YOE5+ years electronics design experience, Bachelor's in Electrical/Computer Engineering or equivalent, strong high-speed circuit and PCB design skills, FPGA familiarity, prototype bring-up and lab verification experience.
LTSpice, OrCAD Capture CIS, Cadence CIS, Cadence Allegro, Verilog, RTL, HLS, optical test sets, signal analyzers, GHz+ oscilloscopes, VNAs, signal generators
Explore Jobs