14 rtl verification engineer jobs at 7 companies in Boston, MA
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Senior Verification Engineer
Wilmington, Massachusetts, United States
$110k-$152k/yr OnsiteFull Time
4+ YOE4+ years verification experience with SystemVerilog/UVM, RTL simulation and debug, scripting (Python/Perl/Tcl), SoC/processor verification, and strong analytical/debugging skills.
SystemVerilog, UVM, VCS, Xcelium, Simvision, Verdi, Questa, Python, Perl, Tcl, Linux, ARM Cortex-M, RISC-V, APB, AHB, AXI, QSPI, UART, DMA
2mo
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Design Verification Engineer - Viasat Government
Marlborough or Carlsbad
$133k-$210k/yr OnsiteFull Time
5+ YOEBachelor's in Electrical or Computer Engineering; 5+ years hardware verification with SystemVerilog/UVM; RTL verification; strong SystemVerilog/UVM; experience with industry EDA tools; US citizenship and active Secret clearance; willingness to travel up to 10%
SystemVerilog, UVM, Siemens Questa, Cadence, Synopsys, Mentor, Python, TCL
2mo
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Senior Formal Verification Engineer
Santa Clara or Austin or Westford or Hillsboro
$168k-$311k/yr HybridFull Time
7+ YOE7+ years experience with formal verification, strong knowledge of Verilog/System Verilog, temporal logic assertions, abstraction techniques, scripting in TCL/Perl/Python, and solid understanding of CPU/GPU architectures.
Verilog, System Verilog, temporal logic assertions, TCL, Perl, Python, Jasper Gold, VC Formal, RTL
2w
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Senior Staff Engineer, Design Verification
Westborough, Massachusetts, United States
$151k-$223k/yr OnsiteFull Time
3+ YOEBachelor's with 5+ years or Master's/PhD with 3+ years in digital design/verification; expertise in UVM, constrained-random verification, SVA, RTL debug; C/C++ and scripting (Python/Perl); Linux experience.
UVM, SystemVerilog, SystemVerilog Assertions (SVA), C, C++, Python, Perl, Linux
2mo
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Modem HW Design Verification Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$128k-$192k/yr OnsiteFull Time
1+ YOEDegree in computer/electrical engineering or related field (BS/MS/PhD) with 1+ years (MS) or 2+ years (BS) engineering experience. Experience in verification planning, SystemVerilog/UVM, RTL languages, C/C++, Python/Perl, Unix/Linux scripting, and GenAI/ML-assisted verification preferred.
SystemVerilog, UVM, OVM, Verilog, VHDL, C, C++, SystemC, Python, Perl, Unix/Linux shell scripting, Makefiles, XML, RTL
1w
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Mixed Signal Design Verification Engineer
Wilmington, Massachusetts, United States
$87k-$120k/yr OnsiteFull Time
2+ YOEMSEE or BSEE with 2+ years industry experience in pre-silicon mixed-signal verification; proficiency modeling analog circuits with SystemVerilog/VerilogAMS/SystemC; circuit design, simulation and verification experience; scripting skills.
SystemVerilog, RNM, VerilogAMS, SystemC, Perl, Python, C/C++, MATLAB, RTL, UVM, Virtuoso, Incisive, Spectre
3mo
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Senior Engineer, Digital Design Engineering
Wilmington, Massachusetts, United States
$124k-$175k/yr HybridFull Time
2+ YOEMaster’s degree in Electrical/Electronic/Computer Engineering or related field; 2+ years in digital/mixed-signal design and verification; proficiency with RTL, Verilog/SystemVerilog; experience with Cadence or Synopsys tools.
Verilog, SystemVerilog, RTL, Cadence, Synopsys
2mo
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FPGA Engineer
Boston, Massachusetts, United States
OnsiteFull Time
RTL proficiency (Verilog or VHDL), real industry FPGA deployment experience, familiarity with major FPGA platforms (Xilinx/AMD, Lattice, Intel/Altera), embedded C/C++ experience, and experience with prototype bring-up and ASIC verification workflows.
Verilog, VHDL, C, C++, RTL, FPGA, Xilinx, AMD, Lattice, Intel/Altera, ASIC, ADC, DAC
3mo
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FPGA Engineer (MA, Boston)
Boston, Massachusetts, United States
OnsiteFull Time
EndoSec: Security software and cryptographic hardware for government and defense.
Experience with RTL, HDL, C/C++, Python; VHDL/Verilog; hardware security; IP core development; FPGA toolchains; Xilinx/Intel devices; simulation and verification; system integration; embedded software testing; cryptography; cocotb/pyuvm.
RTL, VHDL, Verilog, Python, C, C++, Tcl, Vivado, GHDL, Questa, Quartus Prime, Zynq, Versal, Stratix, Agilex, AXI, ACE, Avalon, IP core, Xilinx, FPGA verification tools, cocotb, pyuvm
4d
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Interconnect Design Engineer
Santa Clara or Cambridge or Austin or Boston
$140k-$171k/yr OnsiteFull Time
Requires BS/MS in EE, CE, CS, or related discipline or equivalent experience; RTL design, cache and interconnect knowledge, bus protocols, software engineering, and verification skills.
RISC-V, TileLink, Chisel, Scala, FIRRTL, Verilog, SystemVerilog, VHDL, AXI, AHB, APB, CHI, Bluespec, Git, GitHub, Jira, Confluence
4w
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Principal FPGA Engineer
Boston, Massachusetts, United States
OnsiteFull Time
Proven RTL proficiency (Verilog or VHDL), real-world FPGA deployment experience, familiarity with major FPGA platforms (Xilinx/AMD/Lattice/Intel), embedded C/C++ experience, and exposure to ASIC verification workflows.
Verilog, VHDL, C, C++, Xilinx, AMD, Lattice, Intel/Altera
2mo
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Principal Audio/DSP Systems Engineer
Boston, Massachusetts, United States
$200k-$275k/yr OnsiteFull Time
10+ YOEPhD in Electrical Engineering or related field; 10+ years in audio/signal processing; deployment on DSP/NPU; fixed-point, PTQ/QAT; C/Python/MATLAB; RTL verification; embedded AI inference.
C, Python, MATLAB, TensorFlow/TFLite, PyTorch/ONNX, DSP, RTL verification, SIMD, NPU, Fixed-point programming, Model quantization, Beamforming
3mo
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Modem HW Design Engineer – AI Driven Next Gen Modem Hardware Development
San Diego or Santa Clara or Boxborough
$104k-$192k/yr OnsiteFull Time
1+ YOEBachelor's in engineering or related; 1+ year industry/programming experience; RTL/Verilog/System Verilog and modem development experience; familiarity with synthesis, verification, Unix/Linux shell scripting, Python/Perl.
C, C++, Python, Verilog, System Verilog, Unix/Linux shell scripting, Perl, Makefiles, XML
2mo
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Senior Staff Engineer, Digital IC Design
Westborough, Massachusetts, United States
$151k-$223k/yr OnsiteFull Time
5+ YOEBachelor's in CS/EE (or advanced degree) with 5+ years' related experience; strong micro-architecture, RTL coding and functional verification skills; proficient in Verilog/VHDL; Perl/Python/Tcl a plus; strong teamwork and problem-solving.
Verilog, VHDL, Perl, Python, Tcl, EDA tools