592 silicon jobs at 111 companies in San Jose, CA
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Silicon Engineer
San Francisco or New York City or Seattle
$320k-$485k/yr HybridFull Time
Hands-on expertise in a silicon domain, shipped silicon with detailed ownership, ability to work with partners, strong communication, and a bachelor's or equivalent in a relevant field.
Claude
3w
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Silicon Validation Engineer, Infra Silicon
Sunnyvale, California, United States
$178k-$250k/yr OnsiteFull Time
8+ YOE8+ years in silicon validation or post-silicon bring-up for custom ASICs/accelerators; experience with pre- and post-silicon validation, lab debug tools, and automation using Python/C/C++; bachelor's in CS/CE or equivalent.
Python, C, C++, RTL simulation, emulation platforms, FPGA prototyping, logic analyzers, oscilloscopes, JTAG, protocol analyzers, PCIe, DDR, BMC
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Silicon Test Engineer
San Jose, California, United States
OnsiteFull Time
8+ YOERequires 8–12+ years in semiconductor or silicon photonics test engineering, ATE expertise, silicon validation, production test, DFT/DFM, scripting, programming, and Linux experience.
Advantest 93K, Teradyne, C++, Python, Linux
1mo
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AI Silicon, Silicon Validation Engineer
Palo Alto, California, United States
OnsiteFull Time
5+ YOEB.S. or M.S. in EE/CE or related field,5+ years post-silicon bring-up or hardware validation experience,proficiency with lab test equipment,mixed-signal characterization,and Python for lab automation.
Python, Oscilloscope, Logic Analyzer, Power Analyzer, FPGA, RTL
4w
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Senior Silicon Engineer
Redmond or Mountain View or Santa Clara or Austin or Raleigh or Hillsboro or Boise
$120k-$235k/yr HybridFull Time
5+ YOEExperience verifying silicon using UVM/C, strong RTL and SoC verification background, proficiency with Verilog/System Verilog, and relevant EE/CS/CE degree or equivalent experience.
UVM, C, Verilog, System Verilog, Microsoft Excel
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Silicon Validation Engineer
Mountain View, California, United States
$120k-$475k/yr HybridFull Time
Hands-on silicon validation and post-silicon bring-up experience; SoC/accelerator validation; debug across RTL/firmware/software/board; C/C++ and Python familiarity; lab and emulation experience; must be authorized to work in the US and work from Mountain View office Tue-Thu.
Cadence Palladium, SystemVerilog, UVM, Python, C, C++, JTAG, Oscilloscope, Logic Analyzer, Protocol Analyzer
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Silicon Debug Engineer
Santa Clara, California, United States
OnsiteFull Time
Investigate and root-cause complex silicon failures using electrical characterization and physical failure analysis for advanced SoC components.
3w
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Silicon Domain Architect
San Jose, California, United States
$119k-$178k/yr OnsiteFull Time
4+ YOEBachelor's in EE/CE/CS, 4+ years in semiconductor or FPGA/SoC architecture, experience with hardware security/Root of Trust, translating system requirements to silicon specs, and cross-functional collaboration.
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Silicon Emulation Engineer
Mountain View, California, United States
$175k-$215k/yr HybridFull Time
5+ YOEBachelor's in CS/EE (or related) and 5+ years silicon development experience; experience with hardware emulation platforms, SystemVerilog, scripting (C++, Python, TCL), and strong hardware/software debug skills.
Palladium, Zebu, Veloce, Protium, HAPS, QEMU, VirtualBox, SystemVerilog, C++, Python, TCL, C-DPI, UVM, AXI/AMBA, PCIe, DRAM, Ethernet, JTAG, DFT, UART, SPI, GPIO, Trace32, OpenOCD, TARMAC
1mo
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Strategic Silicon & Tech Sourcing Principal, Networking Silicon
Seattle or Cupertino
$176k-$262k/yr OnsiteFull Time
7+ YOE7+ Mgmt7+ years experience in technical sourcing or supply chain for silicon/semiconductor with strong negotiation, cost modeling, cross-functional engagement, and supplier management skills.
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RFIC Silicon Lead
San Francisco, California, United States
$180k-$230k/yr OnsiteFull Time
10+ YOEMS/PhD in EE (or equivalent), 10+ years RFIC design delivering silicon, deep low-power CMOS RF and synthesizer expertise, transistor-level Cadence Virtuoso/ Spectre/ ADE experience, EM simulation experience, strong communication and technical leadership.
Cadence Virtuoso, Spectre, ADE, EMX, HFSS, Momentum, Calibre, PDK
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Principal Silicon Technology Engineer
San Jose, California, United States
$232k-$348k/yr HybridFull Time
Expertise in advanced silicon technologies, process development, design enablement, NPI and yield analysis; bachelor’s in engineering or physical science required; strong communication and analytical skills.
PDK, EDA
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Sr. Engineer, Silicon Validation
San Jose, California, United States
$150k-$193k/yr OnsiteFull Time
3+ YOEBachelor's in EE or related, 3+ years post-silicon bringup/validation experience, SerDes and mixed-signal characterization, Python scripting, lab equipment proficiency, strong troubleshooting.
BERT, Oscilloscope/DCA, OSA, signal generators, Python, Git, JTAG, I2C, SPI
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Silicon Validation Engineering Manager, Cloud
Sunnyvale, California, United States
$192k-$278k/yr OnsiteFull Time
8+ YOEBachelor's degree or equivalent experience, 8 years in silicon validation, leadership in custom-silicon NPI, and experience with System Verilog, Firmware, C++, or Scripting.
SystemVerilog, Firmware, C++, Scripting, Tensor Processing Unit (TPU)
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Silicon Architect
San Francisco, California, United States
$198k-$233k/yr HybridFull Time
10+ YOE10+ years in semiconductor definition, architecture, SoC/ASIC development, or system architecture for high-volume consumer electronics; expertise in low-power design, semiconductor flows, vendors, and technical leadership.
SoC, ASIC, RTL, CPUs, NPUs, DSPs
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Lead Silicon Photonics Engineer
San Jose or Austin or San Mateo
$270k-$325k/yr OnsiteFull Time
3+ YOEPhD in photonics/physics/EE, 3+ years industry silicon photonics experience, 5+ years EM simulation experience, hands-on PDK/tape-out and lab validation experience, strong communication and problem-solving skills.
Lumerical, Ansys, COMSOL, PDKs, Python, MATLAB
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Silicon Validation Engineer 5
San Jose, California, United States
$221k/yr OnsiteFull Time
8+ YOE8+ years experience, EE degree, expertise in high-speed SerDes, board design, Verilog/VHDL, Python/Perl, statistical analysis, bench equipment; able to lead small technical teams and perform silicon bring-up, validation, and characterization.
Verilog, VHDL, Python, Perl, JMP, R, BERT, VNA, Oscilloscopes, Protocol Exerciser/Analyzers, FPGA
2mo
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Sr. Silicon Photonics Design Engineer
Sunnyvale, California, United States
$139k-$258k/yr OnsiteFull Time
5+ YOEMS or PhD in integrated optics/silicon photonics/electrical engineering/applied physics; 5+ years industry experience; expertise in silicon photonics device design, optical test and fiber-waveguide coupling, RF test (VNA, spectrum analyzer), and programming in Python or C++.
Python, C++, Lumerical, VNA, spectrum analyzer
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Hardware & Silicon Validation Principal Engineer
Santa Clara, California, United States
$151k-$226k/yr OnsiteFull Time
5+ YOEDegree in CS/EE (BS/MS/PhD) with 5–15 years experience, hands-on lab bring-up, post-silicon validation, debugging skills, scripting (Python/Perl/Shell), C/C++, FPGA prototyping, and familiarity with high-speed interfaces and Linux.
oscilloscopes, logic analyzers, protocol analyzers, Python, Perl, Shell, C/C++, Linux, FPGA, simulation, emulation, PCIe, Ethernet
3mo
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Lead Post-Silicon Validation Engineer
Santa Clara, California, United States
OnsiteFull Time
12+ YOELead post-silicon bringup and memory system validation for GPU products; 12+ years in memory systems; experience with DRAM/HBM/GDDR/LPDDR; strong communication and leadership.
SystemC, C++
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