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Principal IC SoC Integration and Design Engineer
Mendota Heights or Fort Collins or Broomfield
$129k-$207k/yr OnsiteFull Time
10+ YOEBachelor's (EE/CE/CS) +12 yrs or Master's +10 yrs; expertise in Verilog/VHDL/SystemVerilog, AMBA, high-speed SERDES/DRAM interfaces, physical implementation and timing closure; strong communication and collaboration; US work authorization required.
AMBA, UART, DRAM, SERDES, Verilog, VHDL, SystemVerilog
1mo
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Principal Firmware Engineer (Eden Prairie, MN, US, 55344)
Eden Prairie, Minnesota, United States
$145k-$175k/yr OnsiteFull Time
10+ YOE10+ years embedded firmware/software experience, strong C/C++ skills, embedded/real-time OS and SoC/FPGA experience, background in power electronics and digital control, Bachelor's degree in engineering/CS/physics required; MS desired.
C, C++, Python, Matlab, Xilinx FPGAs, SOCs, IEC62304
2d
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Principal Engineer
Eagan or Frisco or New York City or Toronto or Ann Arbor
$159k-$295k/yr HybridFull Time
Hands-on experience designing and operating systems to achieve SOC 2, ISO 27001/42001, HIPAA, and FedRAMP compliance; strong backend engineering and cloud experience; identity, encryption, and audit logging expertise; excellent communication.
Python, Java, Go, AWS, Vanta, Drata, OneTrust, SAML, OIDC, OAuth 2.0, NIST 800-53, NIST CSF, CIS Benchmarks
3mo
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Electrical Engineer II - Electroacoustic Engineering
Eden Prairie, Minnesota, United States
$79k-$108k/yr OnsiteFull Time
4+ YOEBS or MS in electrical engineering with 4+ years PCB/PCBA design, layout, testing; ECAD tools; IPC/MIL/IEC standards; DSP/SoC/PMIC knowledge; strong documentation and collaboration.
Siemens Xpedition, Altium, Cadence Allegro, SPICE, Q3D, HFSS, SIWave, Maxwell
3mo
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Principal IC Design Engineer
Broomfield or Mendota Heights
$127k-$203k/yr OnsiteFull Time
12+ YOEDesign high-performance DRAM interface logic; strong HDL (Verilog/VHDL/SystemVerilog); memory interface in SOCs; BS/MS in Engineering with many years of experience; US work authorization.
Verilog, VHDL, SystemVerilog, HDL, Timing analysis, Constraint definitions, Simulation, Synthesis, Formal verification
2mo
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Sr. Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
6+ YOE6+ years in IP or SoC verification; strong SystemVerilog/UVM experience; Python proficiency; exposure to microcode/firmware; excellent debugging and communication skills.
UVM, SystemVerilog, Python, constrained-random verification, AI-assisted tools
2mo
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Senior ASIC Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
3+ YOE3+ years IP/SoC verification; UVM; SystemVerilog; Python; strong debugging and communication skills.
SystemVerilog, Python, UVM, Constrained-Random Verification, Python-based testbenches
4d
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ASIC Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
2+ YOE2+ years IP/SoC verification experience with UVM, SystemVerilog, and Python; bachelor’s or master’s in EE/CE; strong debugging, analytical, and communication skills.
UVM, SystemVerilog, Python
2mo
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Sr. Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
6+ YOE6+ years IP/SoC verification experience; hands-on UVM, SystemVerilog, Python; BS/MS in EE or CE (or equivalent experience); exposure to microcode/firmware; strong analytical and communication skills.
UVM, SystemVerilog, Python
4d
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ASIC Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
2+ YOEBachelor's or Master's in EE/CE,2+ years IP/SoC verification experience, UVM constrained-random experience, strong SystemVerilog and Python skills, analytical debugging and communication skills.
UVM, SystemVerilog, Python
1mo
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Senior ASIC Design Verification Engineer
Minneapolis, Minnesota, United States
OnsiteFull Time
3+ YOEBachelor's degree in EE/CE, 3+ years IP/SoC verification experience, hands-on UVM/SystemVerilog and Python, constrained-random verification, strong debugging and communication skills.
UVM, SystemVerilog, Python
3mo
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Senior Digital Mixed-Signal (DMS) Verification Engineer
Mendota Heights or Broomfield
$108k-$173k/yr OnsiteFull Time
5+ YOE5+ years in digital verification of mixed-signal ASICs/SoCs; UVM/OVM; analog/digital boundary expertise; leadership; Bachelors in EE/CE/CS with 8+ yrs experience or Masters with 6+ yrs; English communication.
UVM, OVM, SystemVerilog, SystemVerilog Assertions, scripting, automation tooling
1mo
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Mgr Electrical Design Analysis
Eden Prairie, Minnesota, United States
$125k-$172k/yr OnsiteFull Time
5+ YOE1+ MgmtBachelor's in electrical engineering, 5+ years electrical product development experience, 1+ year supervisory experience, expertise in PCB/layout, simulation tools, DSP/SoC/PMIC, MS Office and MS Project, and product development best practices.
Siemens Xpedition, Alitum, Cadence Allegro, SPICE, Q3D, HFSS, SIWave, Maxwell, Microsoft Office, Microsoft Project, PWA
1w
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Senior Director, Security Threat
Saint Paul or Naperville
$168k-$253k/yr OnsiteFull Time
12+ YOE5+ MgmtBachelor's in related field or equivalent,12+ years cybersecurity experience,5+ years leadership,experience with SOC,detection engineering,threat intelligence,and incident response;familiarity with cloud and security frameworks.
SIEM, SOAR, Elasticsearch, Splunk, Swimlane, Cortex XSOAR, CrowdStrike, Microsoft Sentinel
1w
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Manager, Risk and Comliance
Chicago or Denver or Minneapolis or Orlando or Raleigh
$111k-$190k/yr OnsiteFull Time
5+ YOEPrepare certification artifacts, support risk assessments, collect and validate evidence, coordinate with product and engineering teams, and support governance and audit activities.
Azure, AWS, GCP, SOC 1, SOC 2, COSO, COBIT, ITIL
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