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SoC Architecture and Design Engineer, Senior Member of Technical Staff (SMTS)
Richardson or Folsom
$177k-$334k/yr OnsiteFull Time
15+ YOEBachelors or Masters in electrical/computer engineering; 15+ years in related field; SystemVerilog/Verilog; RTL-to-GDS flow; Cadence/Synopsys/Siemens; Python/TCL/Perl.
SystemVerilog, Verilog, RTL, EDA tools (Cadence, Synopsys, Siemens), Python, TCL, Perl
3mo
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Staff FPGA Engineer
Pleasanton, California, United States
$150k-$180k/yr OnsiteFull Time
7+ YOE7+ years FPGA engineering experience (EE degree) designing synthesizable RTL, FPGA/SoC board bring-up, PCB collaboration, EDA tools, and lab validation for commercial quantum sensors.
Verilog, VHDL, AMD Zynq, AMD Ultrascale+, RFSoc, Vivado, Questa, SDC, SPI, I2C, AXI, Avalon, Ethernet, AMBA, Wishbone, TCL, Python, Git, Jira, Yocto, PetaLinux, OpenEmbedded, PSL, SystemVerilog, UVVM, UVM, OVM
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Staff Engineer- Electrical
Pleasanton, California, United States
$163k-$214k/yr OnsiteFull Time
8+ YOEBachelor in Electrical Engineering with 8–12 years or Master with 8+ years; strong mixed-signal PCBA, high-density PCB design, SoCs/FPGAs/MCUs; U.S. citizenship or eligible for export controls.
Altium Designer, ECAD tools, PLM systems
3mo
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Senior FPGA Engineer
Pleasanton, California, United States
$130k-$155k/yr OnsiteFull Time
5+ YOEBachelor's degree in EE or related,5+ years FPGA experience (EE) or 7+ for other degrees,HDL (Verilog/VHDL),FPGA/SoC design and board bring-up,EDA tool and lab test proficiency.
Verilog, VHDL, Vivado, Questa, TCL, Git, Jira, Yocto, PetaLinux, OpenEmbedded, SystemVerilog, PSL, UVVM, UVM, OVM, AMD Zynq, AMD Ultrascale+, Electronic test instruments
3mo
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Staff FPGA Engineer
Pleasanton, California, United States
$150k-$180k/yr OnsiteFull Time
7+ YOE7+ years FPGA design experience; HDL (Verilog/VHDL); FPGA/SoC with Zynq/Ultrascale+; Vivado/Questa; PCB collaboration; timing constraints; scripting TCL/Python.
Verilog, VHDL, Vivado, Questa, EDA tools, SDC, TCL, Python
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Senior Firmware Engineer
Pleasanton, California, United States
$142k-$186k/yr OnsiteFull Time
5+ YOEBachelor's degree in EE/CE/CS (or 5+ years relevant experience), 5+ years embedded firmware experience, production-quality C/C++, RTOS/bare-metal MCU development, experience with peripherals/protocols (UART, SPI, I2C, TCP/UDP), Python/Perl scripting, and lab test equipment experience. U.S. citizen or lawful permanent resident required.
C, C++, RTOS, TCP, UDP, UART, SPI, I2C, Python, Perl, GitHub, assembly, lwIP, SoC, FPGA, oscilloscope, function generator, voltmeter, debugger, simulation tools
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Senior Rust Software Engineer
Pleasanton, California, United States
$142k-$186k/yr OnsiteFull Time
6+ YOEBachelor's or Master's in EE/CE/CS with 6+ years software engineering in embedded or hardware-adjacent environments; U.S. citizenship or lawful permanent residency required; hands-on lab experience and strong communication. Preferred: C/C++, Python, SoC/FPGA, device drivers.
Rust, C/C++, Python, Linux, ARM SoC, SoC, FPGA, Linux device drivers, TCP/UDP, UART, SPI, I2C, oscilloscope, function generator, voltmeter
1mo
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Security and Compliance Engineer
United States or Pleasanton
HybridFull Time
5+ YOE5+ years in information security or security engineering, SOC 2/ISO 27001/FedRAMP experience, cloud and network security, IAM, incident response, and strong written communication; CISSP/CISM/CCSP preferred.
SIEM, EDR, IAM, SSO, vulnerability scanners
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Senior Rust Software Engineer
Pleasanton, California, United States
$142k-$186k/yr OnsiteFull Time
6+ YOEBachelor’s degree in EE/CompE/CS,6+ years embedded or hardware-adjacent software experience,US work-authorization,hands-on lab experience,strong communication,expertise in Rust and low-level system integration.
Rust, C, C++, Python, TCP/UDP, UART, SPI, I2C, Linux, SoC, FPGA, oscilloscope, function generator, voltmeter