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2
soc verification engineer
jobs at 2 companies in
New York City, NY
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1mo
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1mo
RTL Design Engineer
New York City or Palo Alto or London
$205k-$285k/yr
Hybrid
Full Time
Normal Computing
: Building probabilistic AI and thermodynamic computing for semiconductor design.
Production SystemVerilog RTL experience, verification with UVM/cocotb/formal, taped-out silicon, ASIC/SoC design background, simulation and timing collaboration experience.
SystemVerilog, UVM, cocotb, formal, Chipyard, OpenTitan, CVA6, RISC-V
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3w
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Senior Engineer, Physical Design Engineering (ASIC)
Somerset County or Wilmington
$117k-$161k/yr
Onsite
Full Time
Analog Devices
NASDAQ: ADI
: Designs and manufactures semiconductors for signal processing and power management.
5+ YOE
Expertise in ASIC/SoC physical design, floorplanning, P&R, timing closure, physical verification, scripting (TCL/Python), and cross-functional collaboration; 5+ years experience preferred.
Cadence, TCL, Python
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Soc Verification Engineer
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New York
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New York
· 2 jobs