8 soc verification engineer jobs at 6 companies in Phoenix, AZ
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Senior CPU Design Verification Engineer
Austin or Phoenix
$142k-$200k/yr HybridFull Time
4+ YOE4+ years in design verification; SystemVerilog/UVM; pre-silicon CPU/SoC verification; strong debugging; Bachelor's or Master in Electrical or Computer Engineering.
SystemVerilog, UVM, EDA tools, Python, Linux
2w
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Senior IP Verification Engineer
Chandler, Arizona, United States
$162k-$219k/yr HybridFull Time
Bachelor's in CS/EE/CE, strong verification experience on complex subsystems/SoCs, test plan and testbench development, coverage and debug, familiarity with Questa/VCS/Jasper Gold/Verdi and scripting.
UPF, Questa, VCS, Jasper Gold, Verdi, Perl, Python
3mo
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Senior Technical Staff Engineer - Verification
Chandler, Arizona, United States
OnsiteFull Time
15+ YOESenior verification engineer with 15+ years in functional verification; expert in SystemVerilog, UVM, and formal verification for IP/SoC; strong debugging and cross-functional collaboration.
SystemVerilog, UVM, Formal Verification, IP-level verification, SoC verification, ARM/RISC architectures
2w
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Senior Technical Staff Engineer - Verification
Bangalore or Chandler
OnsiteFull Time
15+ YOE15+ years functional verification experience; expertise in SystemVerilog, UVM, formal methods, RTL and SoC verification; BS/MS in EE/CE or related; strong communication, mentoring, and problem-solving skills.
SystemVerilog, UVM, Formal, RTL, AI/ML
2w
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Director, Digital Design & Verification
Chandler, Arizona, United States
OnsiteFull Time
Proven leader in digital IC design and verification for mixed-signal SoCs with expertise in RTL, verification methodologies (UVM, formal, AMS/DMS), architecture, and team building.
SystemVerilog, UVM, Formal, AMS/DMS, RTL, STA, DFT
1mo
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Technical Staff Engineer - AMS Verification
Chandler, Arizona, United States
OnsiteFull Time
14+ YOEBachelor's/Master's in electrical engineering plus 14+ years experience, proven AMS verification for advanced SoCs (12nm+), strong PI/SI and silicon-debug skills, and hands-on use of Cadence Virtuoso/Spectre/AMS Designer, Questa ADMS/Symphony, HSPICE.
Cadence Virtuoso, Spectre, AMS Designer, Questa ADMS, Symphony, HSPICE, SPICE
5d
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Principal Engineer
Chandler, Arizona, United States
$174k/yr OnsiteFull Time
5+ YOEBachelor's degree in electrical, electronic, or computer engineering and 5 years of progressive experience. Requires ARM, SystemVerilog, UVM, ASIC verification, SOC testbench, simulations, regression management, and C-based testing.
ARM, I2C, SPI, SPMI, UART, SOC Testbench, SystemVerilog, UVM, GLS, ASIC, C
2w
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Principal FPGA Digital Engineer - 3
Chandler, Arizona, United States
$108k-$162k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE (or MS/PhD) with relevant FPGA/SoC design experience, expertise in VHDL/Verilog and Xilinx toolflow, static timing analysis, bus interfaces, simulation/verification, and ability to obtain DoD Secret clearance.
VHDL, Verilog, AMD Xilinx FPGAs, Vivado IDE, Vitis Unified IDE, Questa/ModelSim, OSVVM, UVM, AXI4, Ethernet, PCIe, UART, SDLC, DDR3, DDR4, DDR5, logic analyzer, oscilloscope, C, C++