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SoC Static Timing Analysis (STA) Engineer, HBM
Folsom or Richardson
$199k-$347k/yr OnsiteFull Time
15+ YOE15+ years chip-level STA ownership at advanced nodes (5nm+), expertise with Synopsys PrimeTime or Cadence Tempus, deep timing methodology knowledge, and Python/Tcl scripting for automation.
Synopsys PrimeTime, Cadence Tempus, Python, Tcl
6d
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SoC Static Timing Analysis (STA) Engineer, HBM
Folsom or Richardson
$199k-$347k/yr OnsiteFull Time
15+ YOE15+ years chip-level STA and sign-off experience at advanced nodes, expertise with Synopsys PrimeTime/Cadence Tempus, deep timing methodology knowledge, and Python/Tcl scripting for flow automation.
Synopsys PrimeTime, Cadence Tempus, Python, Tcl, Synopsys Design Constraints (SDC)
5d
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Senior Staff Digital Design Engineer
Plano, Texas, United States
HybridFull Time
5+ YOE5+ years in digital IC design with Verilog/SystemVerilog, RTL, synthesis, STA, verification, silicon debug, UVM and experience with industry EDA tools; B.Tech/M.Tech in electronics or related field.
Verilog/SystemVerilog, UVM, I²C, I3C, SPI, UART, Python, Tcl, Perl, Shell, Xcelium, Genus, SpyGlass, OneSpin/JasperGold, Innovus, PrimeTime/Tempus, DFT, ARM, AMBA (AXI/AHB/APB), Cadence Virtuoso, STA, LEC, Lint, Formal Verification
1mo
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Principal Engineer, Digital Design (IO Subsystem)
Allen, Texas, United States
OnsiteFull Time
onsemi: Designs and manufactures semiconductor solutions for power and sensing.
10+ YOEBachelor's in EE (Master's preferred), 10+ years digital IC/RTL design, expert SystemVerilog, Python, UVM, UPF/STA/timing signoff, DFT experience, and strong cross-functional collaboration.
SystemVerilog, Python, UVM, UPF, STA, DFT, AI/ML
6d
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Sit Down Forklift
Grapevine, Texas, United States
$19-$21/hr OnsiteFull Time
1+ YOEPrior sit-down forklift experience, RF scanner and label-printing experience, able to lift heavy loads, English proficiency, reliable transportation, pass drug/background/STA checks.
RF scanners
2mo
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Experienced K9 Handler - Multiple Locations
Miami or Atlanta or Dallas
OnsiteFull Time
1+ YOEExperience with on-leash K9 detection, US citizenship, TSA TSA-STA, HS diploma or GED, valid Real ID driver’s license, pass background and drug screen, able to obtain TSA Pre-Check, English proficiency, strong interpersonal skills, ability to work independently or in team.
Explosive detection canine, Background check, TSA
2mo
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Staff Wireless IC Digital Designer
Dallas, Texas, United States
OnsiteFull Time
8+ YOESenior level design engineer with 8-12 years in digital RF/wireless design, IC/SoC development, RTL, and verification.
RTL, Synthesis, STA, ATPG, RFIC, SoC, Digital design, FPGA design
1mo
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Digital IC Design Engineer | Custom
Dallas, Texas, United States
OnsiteFull Time
8+ YOEBachelor's in EE/ECE/Computer Engineering, 8 years engineering experience including 3 years mixed-signal design verification, experience with Gates+SDF timing verification, automation scripting, and mixed-signal verification flows.
JasperGold, Gates+SDF, RTL, STA
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