68 staff designer design systems jobs at 42 companies in Patterson, CA
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Staff Product Designer, Design System
San Jose, California, United States
HybridFull Time
8+ YOERequires 8–10 years of product design experience, including 2+ years creating enterprise design systems, a portfolio, Figma experience, accessibility and responsive design expertise, and front-end collaboration skills.
Claude Code, Cursor, Figma, WCAG
1mo
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Staff, UX Designer - Design System.
San Jose or Boise
HybridFull Time
8+ YOE8+ years product/UX/UI design experience, 3+ years building design systems, hands-on Figma and front-end skills (HTML,CSS,JavaScript,React), Claude Code proficiency, accessibility and production implementation experience, portfolio required.
Figma, HTML, CSS, JavaScript, React, Storybook, Style Dictionary, Claude Code
4w
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Staff UX Designer
San Jose, California, United States
$175k-$215k/yr OnsiteFull Time
8+ YOE8+ years product design experience, strong 0→1 track record, portfolio showing design thinking, systems thinking across mobile and web, comfort with ambiguity, experience shipping consumer products.
2w
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Sr Staff Product Designer, GenStudio & Firefly Enterprise
San Jose or San Francisco
$158k-$301k/yr OnsiteFull Time
8+ YOE8+ years product or systems design experience, prototyping skills, experience with AI-assisted workflows, technical comfort with APIs and rendering pipelines, accessibility knowledge.
Figma, APIs, WCAG, Adobe Firefly, Creative Cloud, Adobe Acrobat Studio, Adobe Express, Adobe Experience Platform, Adobe Experience Manager, GenStudio
1mo
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Staff Hardware Systems Design Engineer
Campbell, California, United States
$150k-$180k/yr OnsiteFull Time
10+ YOEB.S. in Electrical Engineering required (M.S. preferred); 10+ years hardware design experience; track record leading complex hardware projects; experience with circuit design, PCB layout, testing, and lab equipment.
Oscilloscope, Logic Analyzer
3w
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Staff Systems Design Engineer – Cellular Radio Systems
San Jose, California, United States
$180k-$200k/yr OnsiteFull Time
8+ YOE8+ years in cellular systems engineering, BS in EE required (MS/PhD preferred), deep 5G NR and O-RAN expertise, lab RF test experience, system specification and simulation skills.
Cadence Virtuoso, Cadence Spectre, AWR Microwave Office, MATLAB, Python, Claude Code, OpenAirInterface, ORAN-SC, OSC
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Technical Staff Engineer - Digital Design
San Jose, California, United States
$70k-$143k/yr HybridFull Time
12+ YOEBachelor's in EE/CE, 12+ years relevant experience (10+ in FPGA/ASIC IP and system design), VHDL/Verilog expertise, FPGA design/verification experience, strong digital design and architecture knowledge, excellent communication; US citizenship or permanent residency required.
VHDL, Verilog, Libero, Quartus, Vivado, Identify Debugger, SignalTap, ChipScope, ModelSim, QuestaSim, Python, TCL
3mo
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Staff Systems Engineer, Functional Safety
Fremont, California, United States
$191k-$248k/yr HybridFull Time
5+ YOEBSME with 5+ years or MSME with 3+ years or PhD with 1+ year experience in electromechanical system design; CAD (Creo) proficiency; GD&T; test design and documentation; Python/MATLAB basics.
PTC Creo, Windchill, Python, MATLAB, CAD, GD&T
3mo
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Senior Staff Design Verification Engineer – Memory Sub-System
Santa Clara, California, United States
$134k-$201k/yr OnsiteFull Time
5+ YOE5-10 years ASIC/SoC verification; DDR/LPDDR/HBM knowledge; System Verilog/UVM; debugging; digital design fundamentals
SystemVerilog, UVM, DDR4, DDR5, LPDDR4, LPDDR5, HBM2, HBM3, SVA, Python, Palladium, Veloce, waveform_debugging
2mo
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Staff/Principal Hardware System Design Engineer
San Jose, California, United States
$202k-$344k/yr OnsiteFull Time
7+ YOEBachelor's in EE/CE or related, 7+ years in electrical or system-level hardware design; experience with PCB schematic design, BOM, high-speed SI/PI, power delivery, system integration, lab debug equipment, Linux; strong communication and leadership.
Linux, oscilloscope, power supply, protocol analyzer, PCIe, NVMe, Ethernet, JEDEC, PCI-SIG
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Senior/Staff Design Engineer
Santa Clara or Richardson or Austin
$69k-$202k/yr OnsiteFull Time
2+ YOEBachelor's (3–7 yrs) or Master's (2–5 yrs); knowledge of CPU microarchitecture, System Verilog/Verilog/VHDL, simulators, timing/power; scripting in Perl or Python; experience with RISC-V/ARM/MIPS preferred.
System Verilog, Verilog, VHDL, Perl, Python, RISC-V, ARM, MIPS
1mo
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Staff RTL Design Engineer - CPU LS/PF/MMU
Santa Clara or Austin
$179k-$219k/yr OnsiteFull Time
3+ YOEBS/MS in CS/CE/EE or equivalent, 3+ years design experience, CPU RTL design experience, proficiency in Verilog/System Verilog/VHDL, strong software engineering (OOP, functional, TDD), verification skills (SVA, coverage).
Chisel, FIRRTL, Verilog, System Verilog, VHDL, Scala, Bluespec, RISC-V, Git/Github, Jira, Confluence, SVA
4w
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Staff System Architecture and Design Engineer
San Jose, California, United States
$151k-$219k/yr OnsiteFull Time
3+ YOEM.S. in EE or related, 3+ years in power converter project development, expertise in converter topologies, control design, GaN/SiC devices, lab debugging, simulation tools, and strong communication.
Simetrix/Simplis, Mathcad, PLECS, PSIM, VHDL, Verilog, FPGA, MCU, oscilloscope, power analyzer
1mo
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Senior Technical Staff Engineer - Validation (System Design)
San Jose or United States
$91k-$232k/yr OnsiteFull Time
15+ YOEBSEE/BSCS with 15+ years experience (MSEE/MSCS preferred). Deep FPGA architecture and system-level validation experience; RTL in Verilog/VHDL, C/C++; ModelSim/Synplicity; lab debug and protocol expertise (PCIe, Ethernet, SERDES).
FPGA, Verilog, VHDL, C, C++, ModelSim, Synplicity, Synopsys Identify, Xilinx Chipscope, Altera Signalscope, Lattice Reveal, Spirent Test Center, PCIe Analyzer, PCIe Exerciser, Python, PERL, TCL, JTAG, SVF, 1532, STAPL, PCIe Gen3/4/5, SERDES, Ethernet, SPI, I2C, UART, USB, PCI
3mo
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Staff Mechanical Engineer
San Jose, California, United States
OnsiteFull Time
10+ YOEBachelor’s degree in mechanical engineering with 10 years of semiconductor tool design experience in deposition systems; CAD/CAE tools; knowledge of ASME Y14.5, SEMI; design of mechanical systems for semiconductor equipment; teamwork.
CAD, CAe tools, NX, Teamcenter, CFD
4w
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Staff ADAS R&D Systems Engineer
Santa Clara, California, United States
$186k-$251k/yr OnsiteFull Time
3+ YOEMaster's degree in EE/CE/CS or related and 3 years' related experience. Experience leading R&D of autonomous vehicle algorithms (DL, perception, localization, sensor fusion, planning, control). Strong communication and design review skills.
2d
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Staff Platform Engineer, Design Automation
Santa Clara, California, United States
$196k-$368k/yr OnsiteFull Time
12+ YOEBachelor’s or Master’s degree or equivalent experience; 12+ years software engineering experience designing distributed production systems; strong Python and JavaScript/TypeScript skills; applied AI, databases, reliability, observability, CI/CD, and Linux expertise.
Python, JavaScript, TypeScript, LLMs, RAG, Temporal, Airflow, Argo, Jenkins, Docker, Kubernetes, SQL, NoSQL, Kafka, Elasticsearch, Grafana, Linux, CI/CD
1mo
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Senior Staff Engineer, GPU Design Verification (Formal Verification)
San Jose, California, United States
$198k-$297k/yr OnsiteFull Time
8+ YOE8+ years verification experience (formal verification focus), proficiency in formal methods, System Verilog/SVA, Python/Perl/C++, EDA formal tools, strong debugging and architecture knowledge; BS/MS/PhD in CS/CE/related.
Python, Perl, C/C++, System Verilog, System Verilog Assertions (SVA), Confluence, JIRA, Universal Verification Methodology (UVM), UPF
3w
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Senior Member of Technical Staff
San Jose, California, United States
$218k-$291k/yr OnsiteFull Time
8+ YOEBachelor's in CS/Engineering or equivalent,8+ years in applied research/ML/search/NLP,experience productionizing ML/LLM systems,strong coding and system design skills.
1mo
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Sr Staff Engineer Instrument Architecture
Milpitas, California, United States
$169k-$270k/yr HybridFull Time
12+ YOEBachelor’s in engineering,12+ years systems engineering experience, expertise in real-time control, data pipeline and FPGA processing, optics and fluidics knowledge, regulated design control experience.
RTOS, FPGA, DMA, PCIe, USB 3.0, Gigabit Ethernet, RS232, USB, TCP/IP, CAN bus, SPI, I2C