46 substrate engineer jobs at 31 companies in United States
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Substrate Technologist
Irvine, California, United States
OnsiteFull Time
Owning and driving package substrate design, technology, manufacturing, and reliability; cross-functional collaboration to optimize package performance and roadmap.
2mo
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Senior Substrate Layout Engineer
Phoenix or Andover
OnsiteFull Time
4+ YOEBachelor's in electrical/electronics engineering, 4+ years HDI package/layout experience, proficiency with Cadence APD+ and Constraint Manager, CAM350/Blueprint, knowledge of HDI/flip‑chip/interposer designs and JEDEC/IPC standards; must have or obtain U.S. government security clearance.
Cadence APD+, Cadence Constraint Manager, CAM350, Blueprint, Ansys, Sigrity, Clarity
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Substrate Supplier Enablement Engineer
Phoenix, Arizona, United States
$141k-$199k/yr OnsiteFull Time
6+ YOEBachelor's degree plus 6+ years, master's plus 4+ years, or PhD plus 2+ years in a relevant technical field; requires SPC, complex project management, manufacturing, and packaging or substrate experience.
Statistical Process Control (SPC), Product Control System (PCS), FMEA, DOE
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Principal Software Engineer (Substrate Store)
Redmond, Washington, United States
$143k-$275k/yr HybridFull Time
6+ YOEBachelor's degree in computer science or related field and 6+ years of technical engineering experience, or equivalent. Requires C# and/or Rust proficiency, API optimization, reliability, observability, and on-call experience.
C, C++, C#, Java, JavaScript, Python, Rust, Azure, Microsoft 365
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Software Engineer (L3) Data Substrate
United States or Colorado or Hawaii or Illinois or Maryland or Massachusetts or Minnesota or New Jersey or New York or Vermont or District of Columbia or Washington or California or San Francisco or Oakland or San Jose or Washington
$139k-$204k/yr RemoteFull Time
5+ YOEBachelor's or Master's in CS/Engineering, 5+ years software development, proficiency in Python/Java/Scala, experience with big data tools (Kafka, Spark, Hive, Hudi, Presto, Airflow) and AWS services, strong problem-solving and communication skills.
Kafka, Spark, Hive, Hudi, Presto, Airflow, AWS Lakeformation, Glue, Athena, Python, Java, Scala
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Software Engineer (L3) Data Substrate
United States
RemoteFull Time
5+ YOE5+ years of software development; strong Python/Java/Scala; big data tech (Spark, Kafka, Hive); AWS; strong CS fundamentals; excellent communication.
Python, Java, Scala, Spark, Kafka, Hive, Presto, Airflow, AWS
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Sr Staff Manager, Substrate Procurement
Santa Clara, California, United States
$141k-$210k/yr OnsiteFull Time
12+ YOEBachelor’s degree in engineering, business, or related field and 12+ years in semiconductor procurement, strategic sourcing, or supply chain. Requires substrate expertise, complex negotiations, supplier management, modeling, and people leadership.
RFQ, RDL, OSAT, NPI, NRE
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Principal Software Engineer (Substrate Store) (200044475)
United States
OnsiteFull Time
The posting provides no qualifications or experience requirements; details were not translated in the selected language.
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R&D Principal Architect, Package Substrate EDA
Sunnyvale, California, United States
$251k-$377k/yr OnsiteFull Time
Deep experience in package substrate design automation, strong C++, Python, and TCL skills, computational geometry expertise, R&D architectural leadership, and experience collaborating with foundries and OSAT partners. Bachelor's or Master's in CS/EE or equivalent.
C++, Python, TCL, ODB++
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Engineer, Semi Packaging Engineering
Wilmington, Massachusetts, United States
$75k-$103k/yr OnsiteFull Time
2+ YOEMaster’s in engineering; 2-5 years in semiconductor packaging or related field; experience with OSATs, substrates, EMS, and manufacturing ecosystems; strong materials/process knowledge.
3D CAD (SolidWorks), DOE, PFMEA, SPC, RCA, DFM/DFX, Thermo-mechanical simulation
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Lead Packaging Engineer
Palo Alto or Los Angeles or Boston or Chicago or Sydney
$200k-$260k/yr OnsiteFull Time
Bachelor's in engineering or materials science, significant semiconductor packaging experience, expertise in PCB/substrate and mechanical design, failure analysis, thermal management, and delivering scalable hardware from concept to manufacturing.
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Sr. Process Engineer
Green Island, New York, United States
$115k-$135k/yr OnsiteFull Time
3+ YOEBachelor's in engineering with 5–10 years' experience or Master's/PhD with 3–7 years; deep knowledge of semiconductor substrate processing (CMP, grinding, wire-sawing, AFM, XRD), test development, data analysis, and proficiency with Microsoft Office.
Microsoft Office Suite, CAD, SQL, JMP, Python, Visual Basic, AFM, XRD
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Package Design Engineer
Sunnyvale, California, United States
$163k-$237k/yr OnsiteFull Time
8+ YOEBachelor's in engineering or equivalent, 8 years experience in chip package substrate design using Cadence APD or Mentor Expedition, EM/DFM/taping experience, design automation and scripting, B.S./M.S./PhD preferred.
Cadence APD, Mentor Expedition, CAD
3mo
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Package Design Engineer | Semiconductor
Apopka or Raleigh
OnsiteFull Time
8+ YOEBachelor's in engineering; 8+ years semiconductor packaging design experience; strong Cadence Allegro APD+ skills; experience with interposer/substrate, 2.5D/3D packages, SI/PI and thermal analysis tools.
Cadence Allegro Package Designer Plus (APD+), Celsius PowerDC, Sigrity Advanced SI II, Sigrity Advanced PI II, AWR, Momentum, HFSS
1w
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Senior Package Layout Engineer - Hardware
Santa Clara or Nevada or Oregon or Arizona or Washington or California
$136k-$259k/yr HybridFull Time
5+ YOEBachelor's degree in electrical engineering or equivalent experience; 5+ years in PCB layout; substrate layout, Cadence APD or SiP, high-speed signal integrity, and related CAD tools required or preferred.
Cadence APD, SiP, Constraint Manager, Virtuoso, Calibre, Valor
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Principal Packaging Engineer
Santa Clara or Austin or Bangalore or Boston
$200k-$500k/yr OnsiteFull Time
Deep experience in advanced semiconductor package architecture, substrate/assembly technologies, package-level signal and power integrity, thermal and reliability considerations, and cross-functional system optimization.
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Principal Packaging Engineer
Palo Alto or United States or Canada
$180k-$240k/yr HybridFull Time
B.S./M.S. in EE or related, expertise in multi-die package design and UCIe, substrate and SI/PI knowledge, experience with TSMC/OSAT and managing subcontractors; HFSS/Sigrity familiarity a plus.
HFSS, Sigrity, UCIe
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Package Design & Layout Engineer
Palo Alto, California, United States
OnsiteFull Time
6+ YOE6+ years IC package physical design experience, BS/MS in electrical engineering, expertise in package layout tools, multi-die packaging, substrate stack-ups, DFM/DF A closure, and English fluency.
Cadence Allegro Package Designer, APD+, Siemens Xpedition Package Designer, Synopsys IC Package, SKILL, Python, Cadence Sigrity, PowerSI, Ansys, Virtuoso, KLayout, AutoCAD, Cadence Integrity 3D-IC
3mo
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Quantum Superconducting Materials Engineer
Malta, New York, United States
$143k-$247k/yr OnsiteFull Time
15+ YOEMaster’s in engineering with 15+ years of experience; English fluency; travel up to 20%; GPA 3.0 or higher.
Nb, Al, NbN, In, Cu, Sn-based systems, dielectric, substrate, bonding materials, deposition, plating, surface preparation
2mo
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Senior PCB Design Engineer
San Diego, California, United States
$95k-$123k/yr OnsiteFull Time
5+ YOEBS in Electrical Engineering or related, 5+ years PCB/substrate/layout experience, proficiency with PCB CAD tools (Altium, Cadence Allegro/OrCAD, Xpedition, KiCad), IPC CID preferred, signal/power integrity and high-speed interface experience, Excel proficiency.
Altium Designer, Cadence Allegro, OrCAD, Siemens Xpedition, KiCad, AutoCAD, Inventor, SolidWorks, Microsoft Excel
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