1mo
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PE & VC Partner Manager
Austin or Israel
RemoteFull Time
4+ YOE4+ years in partnership management, business development, or investment relations; experience working within or managing partnerships with PE/VC firms; strong executive communication and strategic partnership skills.
Salesforce, HubSpot, CPQ, CLM
1w
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Formal Verification Engineer
Boxborough or Austin or Boston or Santa Clara
HybridFull Time
8+ YOE8+ years design verification experience with strong focus on formal verification, proficiency with VC Formal/JasperGold, SVA, formal methods, and scripting (TCL, Python, Perl); Bachelors/Masters in CE/EE.
VC Formal, JasperGold, SystemVerilog Assertions (SVA), TCL, Python, Perl
3w
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Senior Memory Controller Verification Engineer
Santa Clara or Westford or Austin or Hillsboro or Seattle
$168k-$311k/yr HybridFull Time
6+ YOE6+ years ASIC verification experience, BS/MS or equivalent, SystemVerilog/UVM experience, familiarity with VCS/Debussy/GDB, C/C++ and scripting (Python/Perl/shell), strong debugging and teamwork skills.
VCS, Debussy, GDB, System Verilog, UVM, C, C++, Python, Perl, Shell
1mo
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Silicon IP Verification Methodology Lead (785271)
Austin, Texas, United States
HybridFull Time
15+ YOE15+ years IP/SoC verification experience; expertise in RTL, Verilog, System Verilog, UVM/OVM, formal methods, VCS/Xcelium, Perl/Python scripting, synthesis/STA/DFT, and leadership of distributed teams.
RTL, Verilog, System Verilog, UVM, OVM, VCS, Xcelium, Perl, Python, Design-For-Test (DFT)
1mo
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ASIC DFT Engineer
San Jose or Austin
$153k-$219k/yr HybridFull Time
5+ YOEBachelor's or Master's in Electrical/Computer Engineering with 5+ years experience in DFT, JTAG/Scan/BIST, ATPG and EDA tools (TestMax, Tetramax, Tessent, PrimeTime), gate-level simulation (VCS), and post-silicon validation (P1687).
JTAG, Scan, BIST, ATPG, TestMax, Tetramax, Tessent, PrimeTime, VCS, P1687, Verilog, System Verilog
1mo
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Silicon IP Verification Methodology Lead
Austin, Texas, United States
HybridFull Time
15+ YOE15+ years IP/SoC verification experience; expertise in RTL, Verilog, SystemVerilog, UVM/OVM, VCS/Xcelium, Perl/Python scripting; strong leadership, communication, and cross-site coordination skills; bachelor’s or master’s in EE/CE or related.
RTL, Verilog, SystemVerilog, UVM, OVM, VCS, Xcelium, Perl, Python
1mo
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FPGA Engineer Engineer (eInfochips)
San Jose or Austin
OnsiteFull Time
9+ YOE9+ years experience; proficient in Verilog/System Verilog, EDA tools (VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus), IPXACT, UPF, PCIe/AXI/APB, ARM fabric; scripting with Python/Tcl/Perl; timing signoff and clock-crossing expertise.
Verilog, System Verilog, Python, Tcl, Perl, VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus, IPXACT, UPF
3w
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Events & Community Manager, Austin
Austin, Texas, United States
$140k-$160k/yr OnsiteFull Time
5+ YOE5+ years building and scaling professional communities, strong Austin/Texas startup and VC network, data-driven approach to KPIs, excellent communication and relationship-building, experience in startup/VC/B2B SaaS or fintech.
Twitter/X, LinkedIn
3mo
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Manager - FP&A
Austin or Chicago
OnsiteFull Time
5+ YOE5+ years FP&A; prior consulting/PE/IB/VC; Excel proficient; autonomous; curious; willing to learn real estate industry.
Excel
2mo
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Software Quality Assurance Engineer
Austin or Alexandria
$75k-$90k/yr HybridFull Time
3+ YOE3+ years QA/testing experience; BS/BA; Agile; test planning; UI automation; Azure DevOps; SQL; VCS; accessibility, API, performance, security testing.
Visual Studio, Azure DevOps, Git, TFVC, SQL, Azure SQL, Automation testing
3w
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Analog Modeling Engineer
Austin, Texas, United States
$129k-$217k/yr OnsiteFull Time
5+ YOEBachelor's in EE/Electronics,5+ years analog/mixed-signal verification or behavioral modeling,proficient in SystemVerilog and RNM,experience with Synopsys VCS/Verdi and Python,knowledge of analog circuits.
SystemVerilog, Real Number Modeling (RNM), Synopsys VCS, Verdi, Python, Cadence Virtuoso
1mo
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Founding Talent Partner (GTM), US
New York City or Austin
$150k-$180k/yr HybridFull Time
Experienced full-lifecycle recruiter for go-to-market roles, strong sourcer, data-driven, advanced user of AI hiring tools; VC‑backed enterprise AI/SaaS experience preferred.
4d
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Client Data Specialist, Services and Onboarding
Chicago or Denver or Indianapolis or Austin
$65k-$80k/yr RemoteFull Time
1+ YOE1+ year working with financial/operational data, bachelor’s in finance/accounting/economics or related, strong Excel/Google Sheets skills, excellent communication, self-starter, experience with AI tooling or VC/PE is a plus.
Microsoft Excel, Google Sheets, Visible
1mo
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Fractional Head of Customer Success
Austin or Nashville or Seattle or San Jose or San Diego or Salt Lake City or Raleigh or Durham or Phoenix or Oakland or New York City or Minneapolis or Miami or Los Angeles or Houston or Denver or Dallas or Columbus or Chicago or Boston or Atlanta or United States or Canada
RemoteFull Time
Experienced Head/VP of Customer Success from VC-backed B2B startups, proven in managing and scaling CS teams, designing end-to-end CS lifecycle, comfortable working fractional/hourly, based in USA or Canada.
1mo
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SVB- Relationship Management Director Startup Banking-
Austin, Texas, United States
HybridFull Time
6+ YOEBachelor's +6 years relationship management/business development in startup technology ecosystem OR HS/GED +10 years; experience in Austin VC/tech community, people leadership, commercial banking product knowledge, target-driven and data-oriented.
1mo
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Corporate Attorney
Atlanta or Los Angeles or Chicago or San Diego or Austin or United States
RemoteFull Time
2+ YOEJuris Doctor or equivalent, admitted to practice in any U.S. state, minimum 2 years corporate/in-house law experience; experience with VC funds, cross-border transactions, NVCA docs, M&A due diligence, and complex commercial agreements.
1mo
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Senior Principal Electrical Engineer - FPGA Development
Round Rock, Texas, United States
$174k-$226k/yr OnsiteFull Time
12+ YOE12+ years product development experience; advanced FPGA technologies, Verilog/SystemVerilog and HDL coding; RTL design and simulation; strong analog and digital fundamentals; hardware-software integration. Toolchain experience (Lattice/Xilinx/Altera, Synopsys VCS), Python and Git preferred.
Verilog, SystemVerilog, HDL, RTL, Lattice, Xilinx, Altera, Synopsys VCS, Python, Batch, Git
3w
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Applications Engineer - FPGA Prototyping
San Diego or Austin or Boulder or Costa Mesa or Pasadena or Tempe or Wilsonville or Fremont
$167k-$334k/yr HybridFull Time
5+ YOE5+ years in design/verification/FPGA/ASIC or similar; BS/MS in EE/CE/CS; active experience with SystemVerilog/Verilog/VHDL, FPGA tools, scripting, simulation and customer-facing technical support.
SystemVerilog, Verilog, VHDL, SystemC, C/C++, Perl, Python, XML, JSON, proFPGA, HAPS, Xilinx Vivado, Altera Quartus, Questa, Incisive, VCS, OVM, UVM
2mo
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Member of Technical Staff, Hardware, RTL Design Engineer
Palo Alto or Austin
$200k-$420k/yr OnsiteFull Time
5+ YOEBachelor's in EE/CE and 5+ years industry experience with advanced process nodes (7nm or below); strong RTL, synthesis, physical design, and timing tool experience; expertise in computer architecture and silicon delivery.
System Verilog, VCS, Verdi, Fusion Compiler, PrimeTime, C, C++, python, ISA assembly, PCIe, UCIe, HBM, DDR, AXI, CHI, Static Timing Analysis (STA)
2w
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Post-Silicon Systems Validation Engineer I, Annapurna Labs
Austin, Texas, United States
$111k-$160k/yr OnsiteFull Time
Bachelor's or Master's in CS/CE/EE or related, strong programming in two+ of C/C++,Rust,Go,Python,Lua, familiarity with computer architecture, Linux and Git, system test development and validation experience.
Python, Lua, C/C++, Rust, Go, SystemVerilog/UVM, VCS, Questa, Xcelium, Palladium, Zebu, Veloce, Git, Linux, AWS services, oscilloscopes, logic analyzers, protocol analyzers