15 verification engineer jobs at 8 companies in Reidsville, NC
2d
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Senior Physical Verification Engineer
Greensboro or Richardson or Apopka
OnsiteFull Time
5+ YOEBachelor's degree in engineering, 5+ years related experience, physical verification tools, Linux, TCL, VB, C, Perl, Python, and strong communication skills.
Siemens Calibre, Synopsys ICV, Cadence PVS, Linux, TCL, VB, C, Perl, Python, Electronic Design Automation (EDA), AWR, Keysight ADS, Cadence Virtuoso, Microsoft SharePoint, Cadence Microwave Office (MWO), Ansys HFSS, Siemens Pyxis
1w
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Test / Verification Engineer
Greensboro, North Carolina, United States
$45-$50/hr OnsiteFull Time, Contract
5+ YOERequires 5+ years of relevant experience, verification and validation knowledge, troubleshooting, root cause analysis, automotive protocols, testing equipment, and automotive electrical and electronics diagnostics.
ISO, JAE
1w
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System Verification Engineer
Greensboro, North Carolina, United States
OnsiteFull Time
5+ YOE5+ years in system verification or automotive electrical testing with hands-on root cause analysis; strong knowledge of CAN/ISO/SAE J1939, diagnostics, oscilloscopes, HIL, and standards compliance.
CAN, ISO protocols, SAE J1939, oscilloscopes, hardware-in-the-loop (HIL), diagnostic loggers, diagnostic software
1w
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Senior ASIC Verification Engineer
Durham, North Carolina, United States
$136k-$265k/yr HybridFull Time
5+ YOE5+ years verification experience, degree in EE/CS/CE or equivalent, strong verification methodology and debugging skills, fluency in C++/SystemVerilog, experience with VCS, Debussy, GDB, and UVM.
C++, SystemVerilog, VCS, Debussy, GDB, UVM
1w
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Senior ASIC Verification Engineer
Durham, North Carolina, United States
$136k-$265k/yr HybridFull Time
5+ YOEBachelors/Masters in EE/CS/CE or equivalent experience,5+ years verification experience,knowledge of verification methodologies,experience with C++/SystemVerilog and tools,strong debugging and communication skills.
C++, SystemVerilog, VCS, Debussy, GDB, UVM
4d
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Senior System Verification Engineer
Greensboro, North Carolina, United States
$80k-$85k/yr OnsiteFull Time
Bachelor's degree in electrical, computer, automotive engineering, or related field; automotive systems knowledge, analytical and problem-solving skills, communication, collaboration, and attention to detail required.
Hardware-in-the-Loop (HIL), CAN, LIN, Ethernet
2d
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Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Santa Clara or Austin or Westford or Durham or California
$136k-$265k/yr HybridFull Time
5+ YOEBachelor's or master's degree in engineering or computer science, 5+ years' experience, ASIC workflows, UVM, Verilog/SystemVerilog, simulation tools, and Python, Perl, or systems programming.
Python, Perl, Verilog, SystemVerilog, UVM, VCS, Verdi, Xcelium
2d
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Senior ASIC Design Verification Infrastructure and Tools Engineer – GPU
Santa Clara or Westford or Austin or Durham or California
$136k-$265k/yr OnsiteFull Time
5+ YOEBS/MS or equivalent experience; 5+ years relevant experience; ASIC workflows, UVM, Verilog/SystemVerilog, simulation/debug tools, Python or Perl, and root-cause analysis skills required.
UVM, Verilog, SystemVerilog, VCS, Verdi, Xcelium, Python, Perl
2mo
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Senior ASIC Front End Infrastructure Engineer
Santa Clara or Westford or Austin or Durham
$184k-$357k/yr OnsiteFull Time
8+ YOE8+ years experience; Masters in Electrical Engineering, Computer Engineering, Computer Science or related; Python/Perl; AI tooling; Make; CI (Jenkins); strong problem solving; ASIC/CPU verification knowledge.
Python, Perl, Make, Jenkins
1mo
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DFT Engineer (CE-64000920)
Austin or Chandler or Greensboro
HybridFull Time
2+ YOEMSEE with 2+ years or BS with relevant experience; hands-on ASIC DFT design and verification; experience with FastScan, TestKompress, TetraMAX, Test Compiler; MBIST, scan/ATPG, Verilog/SystemVerilog/VHDL; scripting (Perl, Python, TCL); strong communication.
FastScan, TestKompress, TetraMAX, Test Compiler, Verilog, SystemVerilog, VHDL, Perl, Python, TCL
4w
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Senior Design Quality Engineer - Medical Devices
Carlsbad or Chicago or Raleigh or Durham or Greensboro or Pittsboro
$100k-$140k/yr HybridFull Time
5+ YOEBachelor's degree,5+ years relevant experience,knowledge of FDA 21 CFR 820/ISO 13485/ISO 14971,cGMP,GxP; experience with electromechanical devices, audits, risk management, and verification/validation.
2mo
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Analog Mixed Signal Modeling Engineer (UL - 02)
Austin or Chandler or Greensboro
HybridFull Time
Master's in EE/Computer Eng required. Experience in mixed-signal product development, analog IC design, SystemVerilog RNM, AMS simulators, verification methodologies, and strong analytical and communication skills.
SystemVerilog Real Number Modeling (SV-RNM), Verilog AMS, AMS simulators, System Verilog Assertions, PSL Assertions, Perforce, GIT, UVM, Simulink, Simscape, Python
2mo
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Senior ASIC Front End Infrastructure Engineer
Santa Clara or Durham or Austin or Westford
$184k-$357k/yr OnsiteFull Time
8+ YOEMaster's degree (or equivalent) in EE/CE/CS, 8+ years relevant experience, Python/Perl programming, CI/build system experience (Make, Jenkins), AI tooling experience, verification domain knowledge, strong debugging and problem-solving skills.
Python, Perl, Make, Jenkins, containers
1mo
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Quality Engineer (13229)
Mebane, North Carolina, United States
OnsiteFull Time
0+ YOESupport and lead daily QA on production floor; maintain QMS, execute GMP/food safety audits, perform testing/verification, drive CAPAs. Bachelor's preferred; HACCP/CQE desired; 0-2 years food industry experience.
3mo
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Senior C++ Software Engineer - Chip Design Tools
Santa Clara or Durham or Austin or Westford
$152k-$288k/yr OnsiteFull Time
5+ YOEBS and 5+ years software development experience (MS/PhD preferred); experience with C++ or Golang and Unix/Linux; strong algorithms and computer architecture knowledge; VLSI frontend design and verification experience.
C++, Golang, Verilog, Unix/Linux
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