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Luxoft is an IT consulting and software engineering services firm that provides bespoke technology solutions to external clients, often operating as a staff augmentation or professional services provider.

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Luxoft
Posted 1mo ago

Design Verification Engineer - Data Fabric Systems

Luxoft
Bucharest, Romania
OnsiteFull Time
Responsibilities
  • performing verification
  • developing testbench
  • debugging designs
Requirements
  • 5+ years digital design verification experience with System Verilog, UVM
  • Verilog
  • Functional verification tools (VCS/Cadence/Mentor)
  • Unix/Linux and scripting (Perl, Shell
  • Ruby)
Technical tools mentioned
System VerilogUVMVerilogVCSCadenceMentor GraphicsUnixLinuxPerlShellRuby

Job description

Project description

We are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems.

At the core of our mission lies a culture of innovation. We challenge boundaries to solve some of the world's most critical problems. We are committed to execution excellence, fostering a culture of openness, humility, collaboration, and inclusivity, valuing diverse perspectives along the way.

As Design Verification Engineer at AMD,, you will join leading-edge team responsible for the verification of advanced interconnect systems in state-of-the-art microprocessors. This role focuses on ensuring the functionality, performance, and reliability of high-bandwidth data communication architectures.

We are looking for someone who has a passion for modern, complex processor architecture, digital design, and verification in general. Who are a team player and has good communication skills, strong analytical and problem-solving skills and willing to learn and ready to accept challenges.

Responsibilities

  • Perform pre-Silicon Verification of next generation high performance Microprocessor designs and related IPs
  • Develop, document and execute on verification test plans at unit level of design hierarchy
  • Develop high level language testbench components including stimulus drivers, behavioral models, monitors and checkers in SystemVerilog
  • Develop, simulate and debug directed/random stimulus to ensure design functionality according to specifications

Skills

Must have

  • Minimum of 5 years experience in Digital Design Verification
  • Strong skills with System Verilog and UVM. Good skills with Verilog
  • Exposure to both maintaining an existing Verification Environment as well as creating one from scratch
  • Experience with functional verification tools by VCS, Cadence, Mentor Graphics
  • Experience working in a Unix/Linux environment
  • Good scripting skills (Perl, Shell, Ruby)

Nice to have

  • Proven experience of working with complex designs (not just I2C and other similar designs) would be an asset
  • Good computer architecture, cache coherency knowledge would be an asset
  • Exposure to simulation profile, efficiency improvement, acceleration would be an asset
  • Exposure to leadership or mentorship would be an asset

Other

Languages: English: B2 Upper Intermediate

Seniority: Senior

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